2 blender for the Gameboy Advance
3 Copyright (C) 2021 John Tsiombikas <nuclear@member.fsf.org>
5 This program is free software: you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation, either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <https://www.gnu.org/licenses/>.
23 #define VRAM_START_ADDR 0x6000000
24 #define VRAM_BG_ADDR VRAM_START_ADDR
25 #define VRAM_OBJ_ADDR 0x6010000
26 #define VRAM_LFB_OBJ_ADDR 0x6014000
27 #define VRAM_LFB_FB0_ADDR VRAM_START_ADDR
28 #define VRAM_LFB_FB1_ADDR 0x600a000
30 /* address of character data block x (4 possible blocks, 16k each) */
31 #define VRAM_CHR_BLOCK_ADDR(x) (VRAM_START_ADDR + ((x) << 14))
32 /* address of screen data block x (32 possible blocks, 2k each) */
33 #define VRAM_SCR_BLOCK_ADDR(x) (VRAM_START_ADDR + ((x) << 11))
35 /* fields of a background tile in screen memory */
36 #define BGTILE_HFLIP 0x0400
37 #define BGTILE_VFLIP 0x0800
38 #define BGTILE_PAL(x) ((uint16_t)(x) << 12)
40 /* color palette ram addresses for backgrounds and sprites */
41 #define CRAM_BG_ADDR 0x5000000
42 #define CRAM_OBJ_ADDR 0x5000200
44 /* interrupt handler */
45 #define INTR_VECTOR (*(volatile uint32_t*)0x3007ffc)
47 /* battery backed RAM address */
48 #define SRAM_ADDR 0xe000000
52 #define REG_BASE 0x4000000
53 #define REG8(x) (*(volatile uint8_t*)(REG_BASE + (x)))
54 #define REG16(x) (*(volatile uint16_t*)(REG_BASE + (x)))
55 #define REG32(x) (*(volatile uint32_t*)(REG_BASE + (x)))
57 /* ---- display registers ---- */
58 #define REG_DISPCNT REG16(0x00)
59 #define REG_GREENSWAP REG16(0x02)
60 #define REG_DISPSTAT REG16(0x04)
61 #define REG_VCOUNT REG16(0x06)
62 #define REG_BG0CNT REG16(0x08)
63 #define REG_BG1CNT REG16(0x0a)
64 #define REG_BG2CNT REG16(0x0c)
65 #define REG_BG3CNT REG16(0x0e)
66 /* scrolling registers */
67 #define REG_BG0HOFS REG16(0x10)
68 #define REG_BG0VOFS REG16(0x12)
69 #define REG_BG1HOFS REG16(0x14)
70 #define REG_BG1VOFS REG16(0x16)
71 #define REG_BG2HOFS REG16(0x18)
72 #define REG_BG2VOFS REG16(0x1a)
73 #define REG_BG3HOFS REG16(0x1c)
74 #define REG_BG3VOFS REG16(0x1e)
75 /* BG rotation and scaling registers */
76 #define REG_BG2PA REG16(0x20)
77 #define REG_BG2PB REG16(0x22)
78 #define REG_BG2PC REG16(0x24)
79 #define REG_BG2PD REG16(0x26)
80 #define REG_BG2X REG32(0x28)
81 #define REG_BG2Y REG32(0x2c)
82 #define REG_BG3PA REG16(0x30)
83 #define REG_BG3PB REG16(0x32)
84 #define REG_BG3PC REG16(0x34)
85 #define REG_BG3PD REG16(0x36)
86 #define REG_BG3X REG32(0x38)
87 #define REG_BG3Y REG32(0x3c)
88 /* window registers */
89 #define REG_WIN0H REG16(0x40)
90 #define REG_WIN1H REG16(0x42)
91 #define REG_WIN0V REG16(0x44)
92 #define REG_WIN1V REG16(0x46)
93 #define REG_WININ REG16(0x48)
94 #define REG_WINOUT REG16(0x4a)
96 #define REG_MOSAIC REG16(0x4c)
98 #define REG_BLDCNT REG16(0x50)
99 #define REG_BLDALPHA REG16(0x52)
100 #define REG_BLDY REG16(0x54)
102 /* ---- sound registers ---- */
103 #define REG_SOUND1CNT_L REG16(0x60)
104 #define REG_SOUND1CNT_H REG16(0x62)
105 #define REG_SOUND1CNT_X REG16(0x64)
106 #define REG_SOUND2CNT_L REG16(0x68)
107 #define REG_SOUND2CNT_H REG16(0x6c)
108 #define REG_SOUND3CNT_L REG16(0x70)
109 #define REG_SOUND3CNT_H REG16(0x72)
110 #define REG_SOUND3CNT_X REG16(0x74)
111 #define REG_SOUND4CNT_L REG16(0x78)
112 #define REG_SOUND4CNT_H REG16(0x7c)
113 #define REG_SOUNDCNT_L REG16(0x80)
114 #define REG_SOUNDCNT_H REG16(0x82)
115 #define REG_SOUNDCNT_X REG16(0x84)
116 #define REG_SOUNDBIAS REG16(0x88)
117 #define WAVE_RAM_PTR ((unsigned char*)(REG_BASE + 0x90))
118 #define REG_FIFO_A REG32(0xa0)
119 #define REG_FIFO_B REG32(0xa4)
120 #define FIFO_A_PTR ((unsigned char*)(REG_BASE + 0xa0))
121 #define FIFO_B_PTR ((unsigned char*)(REG_BASE + 0xa4))
123 /* ---- DMA registers ---- */
124 #define REG_DMA0SAD REG32(0xb0)
125 #define REG_DMA0DAD REG32(0xb4)
126 #define REG_DMA0CNT_L REG16(0xb8)
127 #define REG_DMA0CNT_H REG16(0xba)
128 #define REG_DMA1SAD REG32(0xbc)
129 #define REG_DMA1DAD REG32(0xc0)
130 #define REG_DMA1CNT_L REG16(0xc4)
131 #define REG_DMA1CNT_H REG16(0xc6)
132 #define REG_DMA2SAD REG32(0xc8)
133 #define REG_DMA2DAD REG32(0xcc)
134 #define REG_DMA2CNT_L REG16(0xd0)
135 #define REG_DMA2CNT_H REG16(0xd2)
136 #define REG_DMA3SAD REG32(0xd4)
137 #define REG_DMA3DAD REG32(0xd8)
138 #define REG_DMA3CNT_L REG16(0xdc)
139 #define REG_DMA3CNT_H REG16(0xde)
141 /* ---- timer registers ---- */
142 #define REG_TM0CNT_L REG16(0x100)
143 #define REG_TM0CNT_H REG16(0x102)
144 #define REG_TM1CNT_L REG16(0x104)
145 #define REG_TM1CNT_H REG16(0x106)
146 #define REG_TM2CNT_L REG16(0x108)
147 #define REG_TM2CNT_H REG16(0x10a)
148 #define REG_TM3CNT_L REG16(0x10c)
149 #define REG_TM3CNT_H REG16(0x10e)
151 #define REG_TMCNT_L(x) REG16(0x100 + ((x) << 2))
152 #define REG_TMCNT_H(x) REG16(0x102 + ((x) << 2))
154 /* ---- communication registers (serial/joybus/gpio) ---- */
155 #define REG_SIODATA32 REG32(0x120)
156 #define REG_SIOMULTI0 REG16(0x120)
157 #define REG_SIOMULTI1 REG16(0x122)
158 #define REG_SIOMULTI2 REG16(0x124)
159 #define REG_SIOMULTI3 REG16(0x126)
160 #define REG_SIOCNT REG16(0x128)
161 #define REG_SIOMLT_SEND REG16(0x12a)
162 #define REG_SIODATA8 REG16(0x12a)
163 #define REG_RCNT REG16(0x134)
164 #define REG_JOYCNT REG16(0x140)
165 #define REG_JOY_RECV REG32(0x150)
166 #define REG_JOY_TRANS REG32(0x154)
167 #define REG_JOYSTAT REG16(0x158)
169 /* ---- keypad registers ---- */
170 #define REG_KEYINPUT REG16(0x130)
171 #define REG_KEYCNT REG16(0x132)
173 /* ---- interrupts ---- */
174 #define REG_IE REG16(0x200)
175 #define REG_IF REG16(0x202)
176 #define REG_WAITCNT REG16(0x204)
177 #define REG_IME REG16(0x208)
179 #define REG_POSTFLG REG8(0x300)
180 #define REG_HALTCNT REG8(0x301)
181 #define REG_INTMEMCNT REG32(0x800)
183 /* REG_DISPSTAT bits */
184 #define DISPSTAT_VBLANK 0x01
185 #define DISPSTAT_HBLANK 0x02
186 #define DISPSTAT_VMATCH 0x04
187 #define DISPSTAT_IEN_VBLANK 0x08
188 #define DISPSTAT_IEN_HBLANK 0x10
189 #define DISPSTAT_IEN_VMATCH 0x20
190 #define DISPSTAT_VCOUNT(x) ((uint16_t)(x) << 8)
192 /* REG_DISPCNT bits */
193 #define DISPCNT_MODE(x) (x)
194 #define DISPCNT_FB1 0x0010
195 #define DISPCNT_HBLANK_OBJPROC 0x0020
196 #define DISPCNT_OBJMAP_1D 0x0040
197 #define DISPCNT_FORCE_BLANK 0x0080
198 #define DISPCNT_BG0 0x0100
199 #define DISPCNT_BG1 0x0200
200 #define DISPCNT_BG2 0x0400
201 #define DISPCNT_BG3 0x0800
202 #define DISPCNT_OBJ 0x1000
203 #define DISPCNT_WIN0 0x2000
204 #define DISPCNT_WIN1 0x4000
205 #define DISPCNT_WINOBJ 0x8000
207 /* REG_BGXCNT bits */
208 #define BGCNT_PRIO(x) ((uint16_t)(x))
209 #define BGCNT_CHR_BASE(x) ((uint16_t)(x) << 2)
210 #define BGCNT_MOSAIC 0x0040
211 #define BGCNT_256COL 0x0080
212 #define BGCNT_SCR_BASE(x) ((uint16_t)(x) << 8)
213 #define BGCNT_WRAP 0x2000
215 #define BGCNT_SZ(x) ((uint16_t)(x) << 14)
216 #define BGCNT_SZ_TX_256X256 BGCNT_SZ(0)
217 #define BGCNT_SZ_RS_128X128 BGCNT_SZ(0)
218 #define BGCNT_SZ_TX_512X256 BGCNT_SZ(1)
219 #define BGCNT_SZ_RS_256X256 BGCNT_SZ(1)
220 #define BGCNT_SZ_TX_256X512 BGCNT_SZ(2)
221 #define BGCNT_SZ_RS_512X512 BGCNT_SZ(2)
222 #define BGCNT_SZ_TX_512X512 BGCNT_SZ(3)
223 #define BGCNT_SZ_RS_1024X1024 BGCNT_SZ(3)
226 #define IF_VBLANK 0x0001
227 #define IF_HBLANK 0x0002
228 #define IF_VMATCH 0x0004
229 #define IF_TIMER0 0x0008
230 #define IF_TIMER1 0x0010
231 #define IF_TIMER2 0x0020
232 #define IF_TIMER3 0x0040
233 #define IF_COMM 0x0080
234 #define IF_DMA0 0x0100
235 #define IF_DMA1 0x0200
236 #define IF_DMA2 0x0400
237 #define IF_DMA3 0x0800
238 #define IF_KEY 0x1000
239 #define IF_GPAK 0x2000
241 /* REG_TMXCNT bits */
242 #define TMCNT_PRESCL_CLK1 0
243 #define TMCNT_PRESCL_CLK64 1
244 #define TMCNT_PRESCL_CLK256 2
245 #define TMCNT_PRESCL_CLK1024 3
247 #define TMCNT_CASCADE 0x04
248 #define TMCNT_IE 0x40
249 #define TMCNT_EN 0x80
254 #define KEY_SELECT 0x0004
255 #define KEY_START 0x0008
256 #define KEY_RIGHT 0x0010
257 #define KEY_LEFT 0x0020
258 #define KEY_UP 0x0040
259 #define KEY_DOWN 0x0080
260 #define KEY_RT 0x0100
261 #define KEY_LT 0x0200
263 #define KEYCNT_IE 0x4000
264 #define KEYCNT_IAND 0x8000
266 /* REG_SOUNDCNT_L bits */
267 #define SCNT_SS_LVOL(x) ((x) & 7)
268 #define SCNT_SS_RVOL(x) (((x) & 7) << 4)
269 #define SCNT_SS_VOL(x) (SCNT_SS_LVOL(x) | SCNT_SS_RVOL(x))
270 #define SCNT_SS1_EN_R 0x0100
271 #define SCNT_SS2_EN_R 0x0200
272 #define SCNT_SS3_EN_R 0x0400
273 #define SCNT_SS4_EN_R 0x0800
274 #define SCNT_SS_EN_R(x) (SCNT_SS1_EN_R << (x))
275 #define SCNT_SS1_EN_L 0x1000
276 #define SCNT_SS2_EN_L 0x2000
277 #define SCNT_SS3_EN_L 0x4000
278 #define SCNT_SS4_EN_L 0x8000
279 #define SCNT_SS_EN_L(x) (SCNT_SS1_EN_L << (x))
280 #define SCNT_SS1_EN (SCNT_SS1_EN_R | SCNT_SS1_EN_L)
281 #define SCNT_SS2_EN (SCNT_SS2_EN_R | SCNT_SS2_EN_L)
282 #define SCNT_SS3_EN (SCNT_SS3_EN_R | SCNT_SS3_EN_L)
283 #define SCNT_SS4_EN (SCNT_SS4_EN_R | SCNT_SS4_EN_L)
284 #define SCNT_SS_EN(x) (SCNT_SS_EN_L(x) | SCNT_SS_EN_R(x))
291 /* REG_SOUNDCNT_X bits */
292 #define SCNT_MASTER_EN 0x0080
294 /* REG_SOUNDCNT_H bits */
295 #define SCNT_SS_VOL_QRT 0x0000
296 #define SCNT_SS_VOL_HALF 0x0001
297 #define SCNT_SS_VOL_FULL 0x0002
298 #define SCNT_DSA_VOL_HALF 0
299 #define SCNT_DSA_VOL_FULL 0x0004
300 #define SCNT_DSB_VOL_HALF 0
301 #define SCNT_DSB_VOL_FULL 0x0008
302 #define SCNT_DSA_EN_R 0x0100
303 #define SCNT_DSA_EN_L 0x0200
304 #define SCNT_DSA_TIMER0 0
305 #define SCNT_DSA_TIMER1 0x0400
306 #define SCNT_DSA_CLRFIFO 0x0800
307 #define SCNT_DSB_EN_R 0x1000
308 #define SCNT_DSB_EN_L 0x2000
309 #define SCNT_DSB_TIMER0 0
310 #define SCNT_DSB_TIMER1 0x4000
311 #define SCNT_DSB_CLRFIFO 0x8000
313 /* REG_DMAxCNT_H bits */
314 #define DMACNT_DST_INC 0
315 #define DMACNT_DST_DEC 0x0020
316 #define DMACNT_DST_FIXED 0x0040
317 #define DMACNT_SRC_INC 0
318 #define DMACNT_SRC_DEC 0x0080
319 #define DMACNT_SRC_FIXED 0x0100
320 #define DMACNT_REPEAT 0x0200
321 #define DMACNT_16BIT 0
322 #define DMACNT_32BIT 0x0400
323 #define DMACNT_VBLANK 0x1000
324 #define DMACNT_HBLANK 0x2000
325 #define DMACNT_SOUND 0x3000
326 #define DMACNT_IEN 0x4000
327 #define DMACNT_EN 0x8000
330 #endif /* GBAREGS_H_ */