9 uint32_t sr, cause, epc;
10 uint32_t r[29]; /* 29 regs, don't save zero, k0, and k1 */
12 } __attribute__ ((packed));
16 /* set CP0 SR (reg 12) IM bits (8-15) to enable all interrupts */
21 "ori $8, $8, 0xff00\n\t" \
26 /* clear CP0 SR (reg 12) IM bits (8-15) to disable all interrupts */
29 "lui $9, 0xffff\n\t" \
31 "ori $9, $9, 0x00ff\n\t" \
33 "and $8, $8, $9\n\t" \
38 #define mask_all() (REG_IMASK = 0x7ff)
39 #define unmask_all() (REG_IMASK = 0)
41 #define mask_irq(n) (REG_IMASK &= ~(1 << (n)))
42 #define unmask_irq(n) (REG_IMASK |= 1 << (n))
44 #define ack_irq(n) (REG_ISTAT = 1 << (n))
45 #define irq_status(n) (REG_ISTAT & (1 << (n)))
47 void set_irq_handler(int irq, void (*func)(struct intr_frame*));