added debug output on exceptions
[mdlife] / src / intr.s
1 | vi:filetype=gas68k:
2 | the following will go into the .vect section which will be placed at the very
3 | begining of the binary at address 0 by the linker (see lnkscript).
4         .section .vect,"a"
5         .extern start
6 | exception vectors
7         .long _stacktop         | 00 reset - initial SSP
8         .long start             | 01 reset - initial PC
9         .long intr_berr         | 02 bus error
10         .long intr_addr         | 03 address error
11         .long intr_ill          | 04 illegal instruction
12         .long intr_div0         | 05 zero divide
13         .long intr_chk          | 06 chk instruction
14         .long intr_trap         | 07 trapv instruction
15         .long intr_segv         | 08 privilege violation
16         .long intr_trace        | 09 trace
17         .long intr_1010emu      | 0a line 1010 emulator
18         .long intr_1111emu      | 0b line 1111 emulator
19         .long intr_unk          | 0c reserved
20         .long intr_unk          | 0d reserved
21         .long intr_unk          | 0e format error (mc68010 only)
22         .long intr_uninit       | 0f uninitialized interrupt vector
23         .long intr_unk          | 10 \
24         .long intr_unk          | 11 |
25         .long intr_unk          | 12 |
26         .long intr_unk          | 13  > reserved
27         .long intr_unk          | 14 |
28         .long intr_unk          | 15 |
29         .long intr_unk          | 16 |
30         .long intr_unk          | 17 /
31         .long intr_spurious     | 18 spurious interrupt 
32         .long intr_unk          | 19 level 1 interrupt
33         .long intr_unk          | 1a level 2 interrupt
34         .long intr_unk          | 1b level 3 interrupt
35         .long intr_hblank       | 1c level 4 interrupt (hblank in the mega drive)
36         .long intr_unk          | 1d level 5 interrupt
37         .long intr_vblank       | 1e level 6 interrupt (vblank in the mega drive)
38         .long intr_unk          | 1f level 7 interrupt
39         .long intr_unk          | 20 trap 0
40         .long intr_unk          | 21 trap 1
41         .long intr_unk          | 22 trap 2
42         .long intr_unk          | 23 trap 3
43         .long intr_unk          | 24 trap 4
44         .long intr_unk          | 25 trap 5
45         .long intr_unk          | 26 trap 6
46         .long intr_unk          | 27 trap 7
47         .long intr_unk          | 28 trap 8
48         .long intr_unk          | 29 trap 9
49         .long intr_unk          | 2a trap a
50         .long intr_unk          | 2b trap b
51         .long intr_unk          | 2c trap c
52         .long intr_unk          | 2d trap d
53         .long intr_unk          | 2e trap e
54         .long intr_unk          | 2f trap f
55         .long intr_unk          | 30 \
56         .long intr_unk          | 31 |
57         .long intr_unk          | 32 |
58         .long intr_unk          | 33 |
59         .long intr_unk          | 34 |
60         .long intr_unk          | 35 |
61         .long intr_unk          | 36 |
62         .long intr_unk          | 37 |
63         .long intr_unk          | 38  > reserved
64         .long intr_unk          | 39 |
65         .long intr_unk          | 3a |
66         .long intr_unk          | 3b |
67         .long intr_unk          | 3c |
68         .long intr_unk          | 3d |
69         .long intr_unk          | 3e |
70         .long intr_unk          | 3f /
71
72 | from here on we continue in the regular .text section since we don't care
73 | where this code ends up.
74         .text
75         .include "vdpdefs.inc"
76
77 .global enable_intr
78 enable_intr:
79         andi.w #0xf8ff, %sr
80         rts
81
82 .global disable_intr
83 disable_intr:
84         ori.w #0x0300, %sr
85         rts
86
87 | interrupt handlers
88         .macro intr_entry num
89         move.w #0, -(%sp)       | pad to 32bit
90         move.l %sp, -(%sp)
91         pea.l \num
92         bra.w exc_common
93         .endm
94
95 intr_berr:      intr_entry 2
96 intr_addr:      intr_entry 3
97 intr_ill:       intr_entry 4
98 intr_div0:      intr_entry 5
99 intr_chk:       intr_entry 6
100 intr_trap:      intr_entry 7
101 intr_segv:      intr_entry 8
102 intr_trace:     intr_entry 9
103 intr_1010emu:   intr_entry 0xa
104 intr_1111emu:   intr_entry 0xb
105 intr_uninit:    intr_entry 0xf
106 intr_spurious:  intr_entry 0x18
107 intr_unk:       intr_entry 0
108
109         .extern exc_dump
110 exc_common:
111         jsr exc_dump
112         stop #0x2700
113
114 |       .extern vblank_handler
115
116 intr_hblank:
117 |       move.l %d0, -(%sp)
118 |       move.l #0xc0020000, VDP_PORT_CTL
119 |
120 |       move.w testcol, %d0
121 |       move.w %d0, VDP_PORT_DATA
122 |       rol.b #4, %d0
123 |       move.w %d0, testcol
124 |
125 |       move.l (%sp)+, %d0
126         rte
127
128 |testcol: .word 0
129
130 intr_vblank:
131 |       jsr vblank_handler
132         rte