1 #ifndef MEGADRIVE_IO_H_
2 #define MEGADRIVE_IO_H_
6 #define IO_REG_VER *((volatile uint8_t*)0xa10001)
7 #define IO_REG_DATA1 *((volatile uint8_t*)0xa10003)
8 #define IO_REG_DATA2 *((volatile uint8_t*)0xa10005)
9 #define IO_REG_DATA3 *((volatile uint8_t*)0xa10007)
10 #define IO_REG_CTRL1 *((volatile uint8_t*)0xa10009)
11 #define IO_REG_CTRL2 *((volatile uint8_t*)0xa1000b)
12 #define IO_REG_CTRL3 *((volatile uint8_t*)0xa1000d)
13 #define IO_REG_TXDATA1 *((volatile uint8_t*)0xa1000f)
14 #define IO_REG_RXDATA1 *((volatile uint8_t*)0xa10011)
15 #define IO_REG_S_CTRL1 *((volatile uint8_t*)0xa10013)
16 #define IO_REG_TXDATA2 *((volatile uint8_t*)0xa10015)
17 #define IO_REG_RXDATA2 *((volatile uint8_t*)0xa10017)
18 #define IO_REG_S_CTRL2 *((volatile uint8_t*)0xa10013)
19 #define IO_REG_TXDATA3 *((volatile uint8_t*)0xa1001b)
20 #define IO_REG_RXDATA3 *((volatile uint8_t*)0xa1001d)
21 #define IO_REG_S_CTRL3 *((volatile uint8_t*)0xa1001f)
22 #define IO_REG_LOCK *((volatile uint8_t*)0xa14000)
23 #define IO_REG_TMSS *((volatile uint8_t*)0xa14101)
25 #define IO_REG_DATA(x) *((volatile uint8_t*)0xa10003 + ((x) << 1))
26 #define IO_REG_CTRL(x) *((volatile uint8_t*)0xa10009 + ((x) << 1))
30 IO_VER_VERSION_MASK = 0x0f,
50 #define IO_PAD_LOW_MASK 0x3f
51 #define IO_PAD_HIGH_MASK (IO_PAD_A | IO_PAD_START)
53 static inline void io_setdir(int port, uint8_t dir)
55 IO_REG_CTRL(port) = dir;
58 static inline uint16_t io_readpad(int port)
62 bnstate = ~(IO_REG_DATA(port) << 2) & IO_PAD_HIGH_MASK;
64 IO_REG_DATA(port) = 0x40; /* select mode 1 */
67 bnstate |= ~IO_REG_DATA(port) & IO_PAD_LOW_MASK;
69 IO_REG_DATA(port) = 0; /* select mode 0 */
73 static inline uint16_t io_readpad6(int port)
77 IO_REG_DATA(port) = 0x40; /* start with mode 1 */
80 bnstate = ~IO_REG_DATA(port) & IO_PAD_LOW_MASK;
82 IO_REG_DATA(port) = 0; /* select mode 0 */
85 bnstate |= ~(IO_REG_DATA(port) << 2) & IO_PAD_HIGH_MASK;
87 /* then introduce two more rising edges to trigger extended mode */
88 IO_REG_DATA(port) = 0x40;
91 IO_REG_DATA(port) = 0;
94 IO_REG_DATA(port) = 0x40;
98 bnstate |= (uint16_t)(~IO_REG_DATA(port) & 0x7) << 8;
99 IO_REG_DATA(port) = 0; /* return mode to 0 */
104 /*uint16_t io_readpad(int port);*/
106 #endif /* MEGADRIVE_IO_H_ */