7 #if __WATCOMC__ >= 1200
11 typedef unsigned char uint8_t;
12 typedef short int16_t;
13 typedef unsigned short uint16_t;
15 typedef unsigned int uint32_t;
16 typedef unsigned long uintptr_t;
24 #define INLINE __inline
25 #define PACKED __attribute__((packed))
27 #elif defined(__WATCOMC__)
28 #define INLINE __inline
36 #define BSWAP16(x) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8))
38 ((((x) >> 24) & 0xff) | \
39 (((x) >> 8) & 0xff00) | \
40 (((x) << 8) & 0xff0000) | \
44 extern short sinlut[];
46 #define SIN(x) (int)sinlut[(x) & 0x7ff]
47 #define COS(x) (int)sinlut[((x) + 512) & 0x7ff]
49 int mask_to_shift(unsigned int mask);
51 #if defined(__i386__) || defined(__x86_64__) || defined(__386__) || defined(MSDOS)
52 /* fast conversion of double -> 32bit int
54 * - http://chrishecker.com/images/f/fb/Gdmfp.pdf
55 * - http://stereopsis.com/FPU.html#convert
57 static INLINE int32_t cround64(double val)
59 val += 6755399441055744.0;
60 return *(int32_t*)&val;
63 #define cround64(x) ((int32_t)(x))
66 static INLINE float rsqrt(float x)
68 float xhalf = x * 0.5f;
69 int32_t i = *(int32_t*)&x;
70 i = 0x5f3759df - (i >> 1);
72 x = x * (1.5f - xhalf * x * x);
76 extern uint32_t perf_start_count, perf_interval_count;
79 void memset16(void *dest, uint16_t val, int count);
80 #pragma aux memset16 = \
83 "jz memset16_dwords" \
96 void memcpy64(void *dest, void *src, int count);
97 #pragma aux memcpy64 = \
106 parm[ebx][edx][ecx] \
109 #define memcpy64(dest, src, count) memcpy(dest, src, (count) << 3)
112 void perf_start(void);
113 #pragma aux perf_start = \
117 "mov [perf_start_count], eax" \
118 modify[eax ebx ecx edx];
121 #pragma aux perf_end = \
125 "sub eax, [perf_start_count]" \
126 "mov [perf_interval_count], eax" \
127 modify [eax ebx ecx edx];
129 void debug_break(void);
130 #pragma aux debug_break = "int 3";
134 #if defined(__i386__) || defined(__x86_64__)
135 #define memset16(dest, val, count) asm volatile ( \
144 "shl $16, %%eax\n\t" \
148 :: "D"(dest), "a"((uint16_t)(val)), "c"(count) \
151 static void INLINE memset16(void *dest, uint16_t val, int count)
153 uint16_t *ptr = dest;
154 while(count--) *ptr++ = val;
159 #define memcpy64(dest, src, count) asm volatile ( \
161 "movq (%1), %%mm0\n\t" \
162 "movq %%mm0, (%0)\n\t" \
168 :: "r"(dest), "r"(src), "r"(count) \
171 #define memcpy64(dest, src, count) memcpy(dest, src, (count) << 3)
174 #define perf_start() asm volatile ( \
175 "xor %%eax, %%eax\n" \
179 : "=m"(perf_start_count) \
180 :: "%eax", "%ebx", "%ecx", "%edx")
182 #define perf_end() asm volatile ( \
183 "xor %%eax, %%eax\n" \
188 : "=m"(perf_interval_count) \
189 : "m"(perf_start_count) \
190 : "%eax", "%ebx", "%ecx", "%edx")
192 #define debug_break() \
193 asm volatile ("int $3")
197 void __inline memset16(void *dest, uint16_t val, int count)
218 #define perf_start() \
224 mov [perf_start_count], eax \
234 sub eax, [perf_start_count] \
235 mov [perf_interval_count], eax \
239 #define debug_break() \
246 uint32_t maxidx; /* 0: eax */
247 char vendor[12]; /* 0: ebx, edx, ecx */
248 uint32_t id; /* 1: eax */
249 uint32_t rsvd0; /* 1: ebx */
250 uint32_t feat; /* 1: edx */
251 uint32_t feat2; /* 1: ecx */
254 #define CPUID_STEPPING(id) ((id) & 0xf)
255 #define CPUID_MODEL(id) (((id) >> 4) & 0xf)
256 #define CPUID_FAMILY(id) (((id) >> 8) & 0xf)
258 #define CPUID_FEAT_FPU 0x00000001
259 #define CPUID_FEAT_VME 0x00000002
260 #define CPUID_FEAT_DBGEXT 0x00000004
261 #define CPUID_FEAT_PSE 0x00000008
262 #define CPUID_FEAT_TSC 0x00000010
263 #define CPUID_FEAT_MSR 0x00000020
264 #define CPUID_FEAT_PAE 0x00000040
265 #define CPUID_FEAT_MCE 0x00000080
266 #define CPUID_FEAT_CX8 0x00000100
267 #define CPUID_FEAT_APIC 0x00000200
268 #define CPUID_FEAT_SEP 0x00000800
269 #define CPUID_FEAT_MTRR 0x00001000
270 #define CPUID_FEAT_PGE 0x00002000
271 #define CPUID_FEAT_MCA 0x00004000
272 #define CPUID_FEAT_CMOV 0x00008000
273 #define CPUID_FEAT_PAT 0x00010000
274 #define CPUID_FEAT_PSE36 0x00020000
275 #define CPUID_FEAT_PSN 0x00040000
276 #define CPUID_FEAT_CLF 0x00080000
277 #define CPUID_FEAT_DTES 0x00200000
278 #define CPUID_FEAT_ACPI 0x00400000
279 #define CPUID_FEAT_MMX 0x00800000
280 #define CPUID_FEAT_FXSR 0x01000000
281 #define CPUID_FEAT_SSE 0x02000000
282 #define CPUID_FEAT_SSE2 0x04000000
283 #define CPUID_FEAT_SS 0x08000000
284 #define CPUID_FEAT_HTT 0x10000000
285 #define CPUID_FEAT_TM1 0x20000000
286 #define CPUID_FEAT_IA64 0x40000000
287 #define CPUID_FEAT_PBE 0x80000000
289 #define CPUID_FEAT2_SSE3 0x00000001
290 #define CPUID_FEAT2_PCLMUL 0x00000002
291 #define CPUID_FEAT2_DTES64 0x00000004
292 #define CPUID_FEAT2_MONITOR 0x00000008
293 #define CPUID_FEAT2_DS_CPL 0x00000010
294 #define CPUID_FEAT2_VMX 0x00000020
295 #define CPUID_FEAT2_SMX 0x00000040
296 #define CPUID_FEAT2_EST 0x00000080
297 #define CPUID_FEAT2_TM2 0x00000100
298 #define CPUID_FEAT2_SSSE3 0x00000200
299 #define CPUID_FEAT2_CID 0x00000400
300 #define CPUID_FEAT2_FMA 0x00001000
301 #define CPUID_FEAT2_CX16 0x00002000
302 #define CPUID_FEAT2_ETPRD 0x00004000
303 #define CPUID_FEAT2_PDCM 0x00008000
304 #define CPUID_FEAT2_PCIDE 0x00020000
305 #define CPUID_FEAT2_DCA 0x00040000
306 #define CPUID_FEAT2_SSE41 0x00080000
307 #define CPUID_FEAT2_SSE42 0x00100000
308 #define CPUID_FEAT2_X2APIC 0x00200000
309 #define CPUID_FEAT2_MOVBE 0x00400000
310 #define CPUID_FEAT2_POPCNT 0x00800000
311 #define CPUID_FEAT2_AES 0x02000000
312 #define CPUID_FEAT2_XSAVE 0x04000000
313 #define CPUID_FEAT2_OSXSAVE 0x08000000
314 #define CPUID_FEAT2_AVX 0x10000000
316 int read_cpuid(struct cpuid_info *info);