include "sndregs.inc"

	section .vect
	jp main

	org 38h
	jp vblank_isr

	section .text
main:	di
	ld sp, $2000
	im 1
	ei
.hang:	halt
	jr .hang

init:
	call ymwait
	ret

ymwait:
	ld hl, YMADDR
.wait:	ld a, (hl)
	bit 7, a
	jr z, .wait
	ret


vblank_isr:
	;ex af, af'

	;ex af, af'
	;ei
	ret

; vi:ft=z80: