started working on interrupts

[psx_test1] / src / intr.h

diff --git a/src/intr.h b/src/intr.h
new file mode 100644 (file)
index 0000000..d7bab79
--- /dev/null
+++ b/src/intr.h
@@ -0,0 +1,49 @@
+#ifndef INTR_H_
+#define INTR_H_
+
+#include "psxregs.h"
+
+#define NUM_IRQS       11
+
+struct intr_frame {
+       uint32_t sr, cause, epc;
+       uint32_t r[29];         /* 29 regs, don't save zero, k0, and k1 */
+       uint32_t lo, hi;
+} __attribute__ ((packed));
+
+void intr_init(void);
+
+/* set CP0 SR (reg 12) IM bits (8-15) to enable all interrupts */
+#define enable() \
+       asm volatile ( \
+               "mfc0 $12, $8\n\t" \
+               "nop\n\t" \
+               "ori $8, $8, 0xff00\n\t" \
+               "nop\n\t" \
+               "mtc0 $12, $8\n\t" \
+               ::: "$8")
+
+/* clear CP0 SR (reg 12) IM bits (8-15) to disable all interrupts */
+#define disable() \
+       asm volatile ( \
+               "lui $9, 0xffff\n\t" \
+               "mfc0 $12, $8\n\t" \
+               "ori $9, $9, 0x00ff\n\t" \
+               "nop\n\t" \
+               "and $8, $8, $9\n\t" \
+               "nop\n\t" \
+               "mtc0 $12, $8\n\t" \
+               ::: "$8", "$9")
+
+#define mask_all()             (REG_IMASK = 0x7ff)
+#define unmask_all()   (REG_IMASK = 0)
+
+#define mask_irq(n)            (REG_IMASK &= ~(1 << (n)))
+#define unmask_irq(n)  (REG_IMASK |= 1 << (n))
+
+#define ack_irq(n)             (REG_ISTAT = 1 << (n))
+#define irq_status(n)  (REG_ISTAT & (1 << (n)))
+
+void set_irq_handler(int irq, void (*func)(struct intr_frame*));
+
+#endif /* INTR_H_ */