| exception vectors
.long _stacktop | 00 reset - initial SSP
.long start | 01 reset - initial PC
- .long intr_fatal | 02 bus error
- .long intr_fatal | 03 address error
- .long intr_fatal | 04 illegal instruction
- .long intr_fatal | 05 zero divide
- .long intr_fatal | 06 chk instruction
- .long intr_fatal | 07 trapv instruction
- .long intr_fatal | 08 privilege violation
- .long intr_fatal | 09 trace
- .long intr_fatal | 0a line 1010 emulator
- .long intr_fatal | 0b line 1111 emulator
- .long intr_fatal | 0c reserved
- .long intr_fatal | 0d reserved
- .long intr_fatal | 0e format error (mc68010 only)
- .long intr_fatal | 0f uninitialized interrupt vector
- .long intr_fatal | 10 \
- .long intr_fatal | 11 |
- .long intr_fatal | 12 |
- .long intr_fatal | 13 > reserved
- .long intr_fatal | 14 |
- .long intr_fatal | 15 |
- .long intr_fatal | 16 |
- .long intr_fatal | 17 /
- .long intr_fatal | 18 spurious interrupt
- .long intr_fatal | 19 level 1 interrupt
- .long intr_fatal | 1a level 2 interrupt
- .long intr_fatal | 1b level 3 interrupt
+ .long intr_berr | 02 bus error
+ .long intr_addr | 03 address error
+ .long intr_ill | 04 illegal instruction
+ .long intr_div0 | 05 zero divide
+ .long intr_chk | 06 chk instruction
+ .long intr_trap | 07 trapv instruction
+ .long intr_segv | 08 privilege violation
+ .long intr_trace | 09 trace
+ .long intr_1010emu | 0a line 1010 emulator
+ .long intr_1111emu | 0b line 1111 emulator
+ .long intr_unk | 0c reserved
+ .long intr_unk | 0d reserved
+ .long intr_unk | 0e format error (mc68010 only)
+ .long intr_uninit | 0f uninitialized interrupt vector
+ .long intr_unk | 10 \
+ .long intr_unk | 11 |
+ .long intr_unk | 12 |
+ .long intr_unk | 13 > reserved
+ .long intr_unk | 14 |
+ .long intr_unk | 15 |
+ .long intr_unk | 16 |
+ .long intr_unk | 17 /
+ .long intr_spurious | 18 spurious interrupt
+ .long intr_unk | 19 level 1 interrupt
+ .long intr_unk | 1a level 2 interrupt
+ .long intr_unk | 1b level 3 interrupt
.long intr_hblank | 1c level 4 interrupt (hblank in the mega drive)
- .long intr_fatal | 1d level 5 interrupt
+ .long intr_unk | 1d level 5 interrupt
.long intr_vblank | 1e level 6 interrupt (vblank in the mega drive)
- .long intr_fatal | 1f level 7 interrupt
- .long intr_fatal | 20 trap 0
- .long intr_fatal | 21 trap 1
- .long intr_fatal | 22 trap 2
- .long intr_fatal | 23 trap 3
- .long intr_fatal | 24 trap 4
- .long intr_fatal | 25 trap 5
- .long intr_fatal | 26 trap 6
- .long intr_fatal | 27 trap 7
- .long intr_fatal | 28 trap 8
- .long intr_fatal | 29 trap 9
- .long intr_fatal | 2a trap a
- .long intr_fatal | 2b trap b
- .long intr_fatal | 2c trap c
- .long intr_fatal | 2d trap d
- .long intr_fatal | 2e trap e
- .long intr_fatal | 2f trap f
- .long intr_fatal | 30 \
- .long intr_fatal | 31 |
- .long intr_fatal | 32 |
- .long intr_fatal | 33 |
- .long intr_fatal | 34 |
- .long intr_fatal | 35 |
- .long intr_fatal | 36 |
- .long intr_fatal | 37 |
- .long intr_fatal | 38 > reserved
- .long intr_fatal | 39 |
- .long intr_fatal | 3a |
- .long intr_fatal | 3b |
- .long intr_fatal | 3c |
- .long intr_fatal | 3d |
- .long intr_fatal | 3e |
- .long intr_fatal | 3f /
+ .long intr_unk | 1f level 7 interrupt
+ .long intr_unk | 20 trap 0
+ .long intr_unk | 21 trap 1
+ .long intr_unk | 22 trap 2
+ .long intr_unk | 23 trap 3
+ .long intr_unk | 24 trap 4
+ .long intr_unk | 25 trap 5
+ .long intr_unk | 26 trap 6
+ .long intr_unk | 27 trap 7
+ .long intr_unk | 28 trap 8
+ .long intr_unk | 29 trap 9
+ .long intr_unk | 2a trap a
+ .long intr_unk | 2b trap b
+ .long intr_unk | 2c trap c
+ .long intr_unk | 2d trap d
+ .long intr_unk | 2e trap e
+ .long intr_unk | 2f trap f
+ .long intr_unk | 30 \
+ .long intr_unk | 31 |
+ .long intr_unk | 32 |
+ .long intr_unk | 33 |
+ .long intr_unk | 34 |
+ .long intr_unk | 35 |
+ .long intr_unk | 36 |
+ .long intr_unk | 37 |
+ .long intr_unk | 38 > reserved
+ .long intr_unk | 39 |
+ .long intr_unk | 3a |
+ .long intr_unk | 3b |
+ .long intr_unk | 3c |
+ .long intr_unk | 3d |
+ .long intr_unk | 3e |
+ .long intr_unk | 3f /
| from here on we continue in the regular .text section since we don't care
| where this code ends up.
.text
+ .include "vdpdefs.inc"
.global enable_intr
enable_intr:
rts
| interrupt handlers
-intr_fatal:
+ .macro intr_entry num
+ move.w #0, -(%sp) | pad to 32bit
+ move.l %sp, -(%sp)
+ pea.l \num
+ bra.w exc_common
+ .endm
+
+intr_berr: intr_entry 2
+intr_addr: intr_entry 3
+intr_ill: intr_entry 4
+intr_div0: intr_entry 5
+intr_chk: intr_entry 6
+intr_trap: intr_entry 7
+intr_segv: intr_entry 8
+intr_trace: intr_entry 9
+intr_1010emu: intr_entry 0xa
+intr_1111emu: intr_entry 0xb
+intr_uninit: intr_entry 0xf
+intr_spurious: intr_entry 0x18
+intr_unk: intr_entry 0
+
+ .extern exc_dump
+exc_common:
+ jsr exc_dump
stop #0x2700
| .extern vblank_handler
intr_hblank:
+| move.l %d0, -(%sp)
| move.l #0xc0020000, VDP_PORT_CTL
|
| move.w testcol, %d0
| rol.b #4, %d0
| move.w %d0, testcol
|
+| move.l (%sp)+, %d0
rte
+|testcol: .word 0
+
intr_vblank:
| jsr vblank_handler
rte