#define vdp_setreg(reg, val) \
(VDP_CTL = 0x8000 | ((reg) << 8) | (val))
+#define vdp_wait_vblank() \
+ while(!(VDP_STAT & VDP_ST_VBLANK))
+
+#define vdp_wait_vblank_end() \
+ while((VDP_STAT & VDP_ST_VBLANK))
+
+#define vdp_vsync() \
+ (vdp_wait_vblank_end(), vdp_wait_vblank())
+
+
#define VDP_TILE_BG 0
#define VDP_TILE_FG 0x8000
#define VDP_TILE_PAL(x) ((x) << 13)