include "sndregs.inc"
section .vect
- jp main
-
- org 38h
+ jr main ; RST 0
+ dc 6,0
+ dc 6*8, 0 ; RST [1, 7]
jp vblank_isr
TESTDATA_LEN equ 43
+IPC equ $1ffc
section .text
main: di
- ld sp, $2000
+ halt ; XXX
im 1
+ ld sp, $1ff0
call init
; iy is left with YMADDR
ld (iy), YM_OPER
ret
ymwait:
- ld hl, YMADDR
-.wait: ld a, (hl)
+ ld a, (YMADDR)
bit 7, a
- jr z, .wait
+ jr nz, ymwait
ret
-
vblank_isr:
ex af, af'
exx
ld hl, frame
inc (hl)
+ ld a, (hl)
+ ld (IPC+1), a
exx
ex af, af'