From ffc5bece7ae258fe752e1d8895eddabb4133577d Mon Sep 17 00:00:00 2001 From: John Tsiombikas Date: Wed, 13 Dec 2023 06:14:36 +0200 Subject: [PATCH] failed to play sound --- src/z80/main.asm | 99 ++++++++++++++++++++++++++++++++++++++++++++++++--- src/z80/sndregs.inc | 39 +++++++++++++++++--- 2 files changed, 129 insertions(+), 9 deletions(-) diff --git a/src/z80/main.asm b/src/z80/main.asm index 969559a..3727e74 100644 --- a/src/z80/main.asm +++ b/src/z80/main.asm @@ -6,16 +6,50 @@ org 38h jp vblank_isr +TESTDATA_LEN equ 43 + section .text main: di ld sp, $2000 im 1 + call init + ; iy is left with YMADDR + ld (iy), YM_OPER + ld (iy+1), $f0 ; key on ei -.hang: halt - jr .hang +mainloop: + halt ; wait for interrupt + ld a, (frame) + ld b, a ; b: cur frame + ld a, (prev) ; a: prev frame + xor b + bit 7, a + ld a, b + ld (prev), a + jr z, mainloop + + bit 7, a ; 0: play, 1: stop + jr z, .keyon + ld (iy), YM_OPER + ld (iy+1), 0 ; key off + jr mainloop +.keyon: ld (iy), YM_OPER + ld (iy+1), $f0 ; key on + jr mainloop init: + ld ix, testdata + ld iy, YMADDR + ld b, TESTDATA_LEN +.loop: call ymwait + ld a, (ix) + ld (iy), a ; select reg + inc ix call ymwait + ld a, (ix) + ld (iy+1), a ; write reg + inc ix + djnz .loop ret ymwait: @@ -27,10 +61,65 @@ ymwait: vblank_isr: - ;ex af, af' + ex af, af' + exx - ;ex af, af' - ;ei + ld hl, frame + inc (hl) + + exx + ex af, af' + ei ret + +frame: db 0 +prev: db 0 + + +testdata: + db YM_LFO, 0 + db YM_MODE, 0 + db YM_OPER, 0 + db YM_OPER, 1 + db YM_OPER, 2 + db YM_OPER, 3 + db YM_OPER, 4 + db YM_OPER, 5 + db YM_OPER, 6 + db YM_DACEN, 0 + db YM_DT1MUL_OP1, $71 + db YM_DT1MUL_OP2, $0d + db YM_DT1MUL_OP3, $33 + db YM_DT1MUL_OP4, $01 + db YM_TL_OP1, $23 + db YM_TL_OP2, $2d + db YM_TL_OP3, $26 + db YM_TL_OP4, 0 + db YM_RSAR_OP1, $5f + db YM_RSAR_OP2, $99 + db YM_RSAR_OP3, $5f + db YM_RSAR_OP4, $94 + db YM_AMD1R_OP1, 5 + db YM_AMD1R_OP2, 5 + db YM_AMD1R_OP3, 5 + db YM_AMD1R_OP3, 7 + db YM_D2R_OP1, 2 + db YM_D2R_OP2, 2 + db YM_D2R_OP3, 2 + db YM_D2R_OP4, 2 + db YM_D1LRR_OP1, $11 + db YM_D1LRR_OP2, $11 + db YM_D1LRR_OP3, $11 + db YM_D1LRR_OP4, $a6 + db YM_SSGEG_OP1, 0 + db YM_SSGEG_OP2, 0 + db YM_SSGEG_OP3, 0 + db YM_SSGEG_OP4, 0 + db YM_FEEDBALG, $32 + db YM_LRAMSFMS, $c0 + db YM_OPER, 0 + db YM_BLOCKFREQ, $22 + db YM_FREQ, $69 + ; vi:ft=z80: diff --git a/src/z80/sndregs.inc b/src/z80/sndregs.inc index 4efe4d1..21abdd0 100644 --- a/src/z80/sndregs.inc +++ b/src/z80/sndregs.inc @@ -12,9 +12,40 @@ YM_OPER equ $28 YM_DAC equ $2a YM_DACEN equ $2b -YM_OP1_DT1MUL equ $30 -YM_OP2_DT1MUL equ $34 -YM_OP3_DT1MUL equ $38 -YM_OP4_DT1MUL equ $3c +YM_DT1MUL_OP1 equ $30 +YM_DT1MUL_OP2 equ $34 +YM_DT1MUL_OP3 equ $38 +YM_DT1MUL_OP4 equ $3c +YM_TL_OP1 equ $40 +YM_TL_OP2 equ $44 +YM_TL_OP3 equ $48 +YM_TL_OP4 equ $4c +YM_RSAR_OP1 equ $50 +YM_RSAR_OP2 equ $54 +YM_RSAR_OP3 equ $58 +YM_RSAR_OP4 equ $5c +YM_AMD1R_OP1 equ $60 +YM_AMD1R_OP2 equ $64 +YM_AMD1R_OP3 equ $68 +YM_AMD1R_OP4 equ $6c +YM_D2R_OP1 equ $70 +YM_D2R_OP2 equ $74 +YM_D2R_OP3 equ $78 +YM_D2R_OP4 equ $7c +YM_D1LRR_OP1 equ $80 +YM_D1LRR_OP2 equ $84 +YM_D1LRR_OP3 equ $88 +YM_D1LRR_OP4 equ $8c +YM_SSGEG_OP1 equ $90 +YM_SSGEG_OP2 equ $94 +YM_SSGEG_OP3 equ $98 +YM_SSGEG_OP4 equ $9c + +YM_FREQ equ $a0 +YM_BLOCKFREQ equ $a4 +YM_CH3SUPFREQ equ $a8 +YM_CH3SUPBLKFREQ equ $ac +YM_FEEDBALG equ $b0 +YM_LRAMSFMS equ $b4 ; vi:ft=z80: -- 1.7.10.4