X-Git-Url: http://git.mutantstargoat.com/user/nuclear/?p=bootcensus;a=blobdiff_plain;f=src%2Fintr.c;h=2ec1f1b5eb311b02ddafe4281a01b7593e6dc3ad;hp=1ace71e53b19317dd330faea96705559774762d4;hb=81c11bdd80190ec319a82b0402173cfb65fcbf72;hpb=a2f94f569a4c99204de02814a20098a71527e913 diff --git a/src/intr.c b/src/intr.c index 1ace71e..2ec1f1b 100644 --- a/src/intr.c +++ b/src/intr.c @@ -1,4 +1,22 @@ +/* +pcboot - bootable PC demo/game kernel +Copyright (C) 2018 John Tsiombikas + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 3 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY, without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ #include +#include "config.h" #include "intr.h" #include "desc.h" #include "segm.h" @@ -37,12 +55,14 @@ #define OCW2_EOI (1 << 5) -static void init_pic(int offset); +void init_pic(void); static void gate_desc(desc_t *desc, uint16_t sel, uint32_t addr, int dpl, int type); /* defined in intr_asm.S */ void set_idt(uint32_t addr, uint16_t limit); void intr_entry_default(void); +void irq7_entry_check_spurious(void); +void irq15_entry_check_spurious(void); /* the IDT (interrupt descriptor table) */ static desc_t idt[256] __attribute__((aligned(8))); @@ -73,10 +93,16 @@ void init_intr(void) */ #include "intrtab.h" + /* change irq7 and irq15 to special entry points which first + * make sure we didn't get a spurious interrupt before proceeding + */ + set_intr_entry(IRQ_TO_INTR(7), irq7_entry_check_spurious); + set_intr_entry(IRQ_TO_INTR(15), irq15_entry_check_spurious); + /* initialize the programmable interrupt controller * setting up the maping of IRQs [0, 15] to interrupts [32, 47] */ - init_pic(IRQ_OFFSET); + init_pic(); eoi_pending = 0; } @@ -91,7 +117,10 @@ struct intr_frame *get_intr_frame(void) /* set an interrupt handler function for a particular interrupt */ void interrupt(int intr_num, intr_func_t func) { + int iflag = get_intr_flag(); + disable_intr(); intr_func[intr_num] = func; + set_intr_flag(iflag); } /* this function is called from all interrupt entry points @@ -121,14 +150,19 @@ void dispatch_intr(struct intr_frame frm) } } -static void init_pic(int offset) +void init_pic(void) +{ + prog_pic(IRQ_OFFSET); +} + +void prog_pic(int offs) { /* send ICW1 saying we'll follow with ICW4 later on */ outb(ICW1_INIT | ICW1_ICW4_NEEDED, PIC1_CMD); outb(ICW1_INIT | ICW1_ICW4_NEEDED, PIC2_CMD); /* send ICW2 with IRQ remapping */ - outb(offset, PIC1_DATA); - outb(offset + 8, PIC2_DATA); + outb(offs, PIC1_DATA); + outb(offs + 8, PIC2_DATA); /* send ICW3 to setup the master/slave relationship */ /* ... set bit3 = 3rd interrupt input has a slave */ outb(4, PIC1_DATA); @@ -169,6 +203,49 @@ void set_intr_entry(int num, void (*handler)(void)) gate_desc(idt + num, selector(SEGM_KCODE, 0), (uint32_t)handler, dpl, type); } +void set_pic_mask(int pic, unsigned char mask) +{ + outb(mask, pic > 0 ? PIC2_DATA : PIC1_DATA); +} + +unsigned char get_pic_mask(int pic) +{ + return inb(pic > 0 ? PIC2_DATA : PIC1_DATA); +} + +void mask_irq(int irq) +{ + int port; + unsigned char mask; + + if(irq < 8) { + port = PIC1_DATA; + } else { + port = PIC2_DATA; + irq -= 8; + } + + mask = inb(port) | (1 << irq); + outb(mask, port); +} + +void unmask_irq(int irq) +{ + int port; + unsigned char mask; + + if(irq < 8) { + port = PIC1_DATA; + } else { + port = PIC2_DATA; + irq -= 8; + } + + mask = inb(port) & ~(1 << irq); + outb(mask, port); +} + + void end_of_irq(int irq) { int intr_state = get_intr_flag(); @@ -186,3 +263,10 @@ void end_of_irq(int irq) set_intr_flag(intr_state); } + +#ifdef ENABLE_GDB_STUB +void exceptionHandler(int id, void (*func)()) +{ + set_intr_entry(id, func); +} +#endif