X-Git-Url: http://git.mutantstargoat.com/user/nuclear/?p=dosdemo;a=blobdiff_plain;f=src%2Futil.h;h=b305d78697816a40303d98f012219d92750a2ddd;hp=eb3773d4e568a1b3316d24a0c8c227b06defa53d;hb=e8b26db00c934d141f16652cb8dcbeae23b17e48;hpb=ee4a19d1405ea1ee7fbbeef1cdf71292d21f353a

diff --git a/src/util.h b/src/util.h
index eb3773d..b305d78 100644
--- a/src/util.h
+++ b/src/util.h
@@ -5,12 +5,15 @@
 
 #ifdef __GNUC__
 #define INLINE __inline
+#define PACKED __attribute__((packed))
 
 #elif defined(__WATCOMC__)
 #define INLINE __inline
+#define PACKED
 
 #else
 #define INLINE
+#define PACKED
 #endif
 
 /* fast conversion of double -> 32bit int
@@ -24,4 +27,104 @@ static INLINE int32_t cround64(double val)
 	return *(int32_t*)&val;
 }
 
+extern uint32_t perf_start_count, perf_interval_count;
+
+#ifdef __WATCOMC__
+void perf_start(void);
+#pragma aux perf_start = \
+	"xor eax, eax" \
+	"cpuid" \
+	"rdtsc" \
+	"mov [perf_start_count], eax" \
+	modify[eax ebx ecx edx];
+
+void perf_end(void);
+#pragma aux perf_end = \
+	"xor eax, eax" \
+	"cpuid" \
+	"rdtsc" \
+	"sub eax, [perf_start_count]" \
+	"mov [perf_interval_count], eax" \
+	modify [eax ebx ecx edx];
+
+void debug_break(void);
+#pragma aux debug_break = "int 3";
+
+void halt(void);
+#pragma aux halt = "hlt";
+
+void memset16(void *ptr, int val, int count);
+#pragma aux memset16 = \
+	"rep stosw" \
+	parm[edi][eax][ecx];
+#endif
+
+#ifdef __GNUC__
+#define perf_start()  asm volatile ( \
+	"xor %%eax, %%eax\n" \
+	"cpuid\n" \
+	"rdtsc\n" \
+	"mov %%eax, %0\n" \
+	: "=m"(perf_start_count) \
+	:: "%eax", "%ebx", "%ecx", "%edx")
+
+#define perf_end() asm volatile ( \
+	"xor %%eax, %%eax\n" \
+	"cpuid\n" \
+	"rdtsc\n" \
+	"sub %1, %%eax\n" \
+	"mov %%eax, %0\n" \
+	: "=m"(perf_interval_count) \
+	: "m"(perf_start_count) \
+	: "%eax", "%ebx", "%ecx", "%edx")
+
+#define debug_break() \
+	asm volatile ("int $3")
+
+#define halt() \
+	asm volatile("hlt")
+
+#define memset16(ptr, val, count) asm volatile ( \
+	"rep stosw\n\t" \
+	:: "D"(ptr), "a"(val), "c"(count))
+#endif
+
+#ifdef _MSC_VER
+#define perf_start() \
+	do { \
+		__asm { \
+			xor eax, eax \
+			cpuid \
+			rdtsc \
+			mov [perf_start_count], eax \
+		} \
+	} while(0)
+
+#define perf_end() \
+	do { \
+		__asm { \
+			xor eax, eax \
+			cpuid \
+			rdtsc \
+			sub eax, [perf_start_count] \
+			mov [perf_interval_count], eax \
+		} \
+	} while(0)
+
+#define debug_break() \
+	do { \
+		__asm { int 3 } \
+	} while(0)
+
+#define memset16(ptr, val, count) \
+	do { \
+		__asm { \
+			mov edi, ptr \
+			mov ecx, count \
+			mov eax, val \
+			rep stosw \
+		} \
+	} while(0)
+#endif
+
 #endif	/* UTIL_H_ */