3 The following is not all confirmed.
7 RAM is mapped to 0, 40000000 (cache-coherent) and c0000000h (uncached) in VC
8 space. In the ARM address space is mapped to 0(?).
10 I/O base is at 7e000000 in VC address space (rpi1?), and mapped to different
11 ranges for each model in ARM space.