1 /* mailbox registers (MB 0: input 1: output)
2 * function | MB 0 | MB 1
3 * rd/wr | 00 | 20 ( upper 28: data, lower 4: channel )
9 * channel 1: framebuffer
12 * read: read status reg loop while empty flag is set
13 * write: read status loop while full flag is set
19 #define IOBASEADDR 0x20000000
21 #define IOBASEADDR 0x3f000000
24 #define phys2bus(addr) ((addr) | 0x40000000)
25 #define bus2phys(addr) ((addr) & 0x3fffffff)
27 #define IOREG_ADDR(x) (IOBASEADDR | (x))
28 #define REG_MB_READ *((volatile uint32_t*)IOREG_ADDR(0xb880))
29 #define REG_MB_STAT *((volatile uint32_t*)IOREG_ADDR(0xb898))
30 #define REG_MB_WRITE *((volatile uint32_t*)IOREG_ADDR(0xb8a0))
32 #define MB_STAT_FULL 0x80000000
33 #define MB_STAT_EMPTY 0x40000000
35 #define MB_CHAN_FRAMEBUF 1
36 #define MB_CHAN_PROP 8
38 #define PROP_CODE_REQ 0
39 #define PROP_RESP_OK 0x80000000
41 #define PROP_TAG_END 0
42 #define PROP_TAG_BLANKSCR 0x40002
44 int prop_blankscr(int onoff);
46 uint32_t mb_read(int chan);
47 void mb_write(int chan, uint32_t val);
56 static uint32_t propbuf[64] __attribute__((aligned(16)));
58 int prop_blankscr(int onoff)
60 uint32_t *pb = propbuf;
64 *pb++ = PROP_TAG_BLANKSCR;
65 *pb++ = 4; /* data size */
66 *pb++ = PROP_CODE_REQ;
67 *pb++ = onoff ? 1 : 0;
69 *pb++ = 0; /* padding */
70 propbuf[0] = (char*)pb - (char*)propbuf;
72 mb_write(MB_CHAN_PROP, (uint32_t)propbuf >> 4);
73 mb_read(MB_CHAN_PROP);
75 return propbuf[1] == PROP_RESP_OK ? 0 : -1;
78 uint32_t mb_read(int chan)
82 while(REG_MB_STAT & MB_STAT_EMPTY);
84 } while((val & 0xf) != chan);
88 void mb_write(int chan, uint32_t val)
90 while(REG_MB_STAT & MB_STAT_FULL);
91 REG_MB_WRITE = (val << 4) | chan;