fighting with interrupt vectors
[rpikern] / src / sysctl.h
1 #ifndef SYSCTL_H_
2 #define SYSCTL_H_
3
4 /* c7 reg, op1=0, mode c14 is clean&inval, op2=1 is cacheline MVA */
5 #define sysctl_dcache_clean_inval(addr, len) \
6         do { \
7                 register uint32_t a asm("r0") = addr; \
8                 asm volatile( \
9                         "\n0:\tmcr p15, 0, %0, c7, c14, 1" \
10                         "\n\tadd %0, #64" \
11                         "\n\tcmp %0, %1" \
12                         "\n\tblo 0b" \
13                         :: "r"(a), "r"(addr + len) \
14                         : "memory"); \
15         } while(0)
16
17 #define sysctl_icache_inval(addr, len) \
18         do { \
19                 register uint32_t a asm("r0") = addr; \
20                 asm volatile( \
21                         "\n0:\tmcr p15, 0, %0, c7, c5, 1" \
22                         "\n\tadd %0, #64" \
23                         "\n\tcmp %0, %1" \
24                         "\n\tblo 0b" \
25                         :: "r"(a), "r"(addr + len) \
26                         : "memory"); \
27         } while(0)
28
29 #endif  /* SYSCTL_H_ */