10 #define IOBASEADDR 0x3f000000
11 #define IOSIZE 16777216
12 #define IOREGADDR(x) ((x) | IOBASEADDR)
14 #define REG_UART_FLAGS *(volatile uint32_t*)IOREGADDR(0x201018)
15 #define REG_UART_IBRD *(volatile uint32_t*)IOREGADDR(0x201024)
16 #define REG_UART_FBRD *(volatile uint32_t*)IOREGADDR(0x201028)
17 #define REG_UART_LCTL *(volatile uint32_t*)IOREGADDR(0x20102c)
18 #define REG_UART_CTL *(volatile uint32_t*)IOREGADDR(0x201030)
20 #define FLAGS_TXEMPTY 0x80
21 #define FLAGS_RXFULL 0x40
22 #define FLAGS_TXFULL 0x20
23 #define FLAGS_RXEMPTY 0x10
24 #define FLAGS_BUSY 0x08
25 #define FLAGS_CTS 0x01
27 #define LCTL_8BIT 0x60
28 #define LCTL_FIFOEN 0x10
29 #define LCTL_PAREN 0x02
32 #define CTL_RXEN 0x200
33 #define CTL_TXEN 0x100
36 int uart_config(int rate)
41 if((fd = open("/dev/mem", O_RDWR)) == -1) {
42 perror("failed to open /dev/mem");
45 if((ptr = mmap((void*)IOBASEADDR, IOSIZE, PROT_READ | PROT_WRITE,
46 MAP_SHARED | MAP_FIXED, fd, IOBASEADDR)) == (void*)-1) {
47 perror("failed to map IO space");
52 while(REG_UART_FLAGS & FLAGS_BUSY);
54 div = (CLK << 6) / (rate << 4);
55 printf("setting divisor (i/f): %d %d\n", div >> 6, div & 0x3f);
56 REG_UART_IBRD = div >> 6;
57 REG_UART_FBRD = div & 0x3f;
58 REG_UART_LCTL = LCTL_8BIT | LCTL_FIFOEN;
60 REG_UART_CTL = CTL_RXEN | CTL_TXEN | CTL_EN;