From dafa6a42823aa518afc6b56c5a08e762b45b1b05 Mon Sep 17 00:00:00 2001 From: John Tsiombikas Date: Fri, 17 Apr 2020 09:48:53 +0300 Subject: [PATCH 1/1] rpi midi recieve test --- Makefile | 11 ++++++++++ midirecv.c | 29 +++++++++++++++++++++++++++ uart.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ uart.h | 6 ++++++ 4 files changed, 111 insertions(+) create mode 100644 Makefile create mode 100644 midirecv.c create mode 100644 uart.c create mode 100644 uart.h diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..ddd10d6 --- /dev/null +++ b/Makefile @@ -0,0 +1,11 @@ +obj = midirecv.o uart.o +bin = midirecv + +CFLAGS = -pedantic -Wall -g + +$(bin): $(obj) + $(CC) -o $@ $(obj) $(LDFLAGS) + +.PHONY: clean +clean: + rm -f $(obj) $(bin) diff --git a/midirecv.c b/midirecv.c new file mode 100644 index 0000000..673e2d1 --- /dev/null +++ b/midirecv.c @@ -0,0 +1,29 @@ +#include +#include +#include +#include +#include "uart.h" + +int main(void) +{ + int i, fd, rdsz, count; + unsigned char buf[4096]; + + if((fd = open("/dev/ttyAMA0", O_RDWR | O_NOCTTY)) == -1) { + perror("failed to open serial port /dev/ttyAMA0"); + return 1; + } + + uart_config(31250); + write(fd, "U", 1); + + count = 0; + while((rdsz = read(fd, buf, sizeof buf)) > 0) { + for(i=0; i +#include +#include +#include +#include +#include "uart.h" + +#define CLK 3000000 + +#define IOBASEADDR 0x3f000000 +#define IOSIZE 16777216 +#define IOREGADDR(x) ((x) | IOBASEADDR) + +#define REG_UART_FLAGS *(volatile uint32_t*)IOREGADDR(0x201018) +#define REG_UART_IBRD *(volatile uint32_t*)IOREGADDR(0x201024) +#define REG_UART_FBRD *(volatile uint32_t*)IOREGADDR(0x201028) +#define REG_UART_LCTL *(volatile uint32_t*)IOREGADDR(0x20102c) +#define REG_UART_CTL *(volatile uint32_t*)IOREGADDR(0x201030) + +#define FLAGS_TXEMPTY 0x80 +#define FLAGS_RXFULL 0x40 +#define FLAGS_TXFULL 0x20 +#define FLAGS_RXEMPTY 0x10 +#define FLAGS_BUSY 0x08 +#define FLAGS_CTS 0x01 + +#define LCTL_8BIT 0x60 +#define LCTL_FIFOEN 0x10 +#define LCTL_PAREN 0x02 +#define LCLT_BRK 0x01 + +#define CTL_RXEN 0x200 +#define CTL_TXEN 0x100 +#define CTL_EN 0x001 + +int uart_config(int rate) +{ + int fd, div; + void *ptr; + + if((fd = open("/dev/mem", O_RDWR)) == -1) { + perror("failed to open /dev/mem"); + return 1; + } + if((ptr = mmap((void*)IOBASEADDR, IOSIZE, PROT_READ | PROT_WRITE, + MAP_SHARED | MAP_FIXED, fd, IOBASEADDR)) == (void*)-1) { + perror("failed to map IO space"); + return 1; + } + + REG_UART_CTL = 0; + while(REG_UART_FLAGS & FLAGS_BUSY); + + div = (CLK << 6) / (rate << 4); + printf("setting divisor (i/f): %d %d\n", div >> 6, div & 0x3f); + REG_UART_IBRD = div >> 6; + REG_UART_FBRD = div & 0x3f; + REG_UART_LCTL = LCTL_8BIT | LCTL_FIFOEN; + + REG_UART_CTL = CTL_RXEN | CTL_TXEN | CTL_EN; + + munmap(ptr, IOSIZE); + close(fd); + return 0; +} diff --git a/uart.h b/uart.h new file mode 100644 index 0000000..39a765c --- /dev/null +++ b/uart.h @@ -0,0 +1,6 @@ +#ifndef UART_H_ +#define UART_H_ + +int uart_config(int rate); + +#endif /* UART_H_ */ -- 1.7.10.4