X-Git-Url: http://git.mutantstargoat.com/user/nuclear/?p=snes_test1;a=blobdiff_plain;f=hwregs.inc;h=92afad89e14aef6ecdbdd946390a783b36505b3c;hp=672aedf4555e1c58f9b6dd4b1e2a1f77c2429a05;hb=HEAD;hpb=4b093322cbd6142997aa4f5c34b63f4c68a4cfdb

diff --git a/hwregs.inc b/hwregs.inc
index 672aedf..92afad8 100644
--- a/hwregs.inc
+++ b/hwregs.inc
@@ -12,14 +12,14 @@
 	REG_BG4SC  	= $210a
 	REG_BG12NBA	= $210b
 	REG_BG34NBA	= $210c
-	REG_BG1HOFFS	= $210d
-	REG_BG1VOFFS	= $210e
-	REG_BG2HOFFS	= $210f
-	REG_BG2VOFFS	= $2110
-	REG_BG3HOFFS	= $2111
-	REG_BG3VOFFS	= $2112
-	REG_BG4HOFFS	= $2113
-	REG_BG4VOFFS	= $2114
+	REG_BG1HOFS	= $210d
+	REG_BG1VOFS	= $210e
+	REG_BG2HOFS	= $210f
+	REG_BG2VOFS	= $2110
+	REG_BG3HOFS	= $2111
+	REG_BG3VOFS	= $2112
+	REG_BG4HOFS	= $2113
+	REG_BG4VOFS	= $2114
 	REG_VMAINC	= $2115
 	REG_VMADDL	= $2116
 	REG_VMADDH	= $2117
@@ -82,6 +82,8 @@
 	REG_MDMAEN	= $420b
 	REG_HDMAEN	= $420c
 
+	REG_HVBJOY	= $4212
+
 	REG_DMAP_BASE	= $4300
 	REG_BBAD_BASE	= $4301
 	REG_A1TL_BASE	= $4302
@@ -94,17 +96,17 @@
 	REG_A2AH_BASE	= $4309
 	REG_NTRL_BASE	= $430a
 
-	.define REG_DMAP(n)	(REG_DMAP_BASE | (n << 4))
-	.define REG_BBAD(n)	(REG_BBAD_BASE | (n << 4))
-	.define REG_A1TL(n)	(REG_A1TL_BASE | (n << 4))
-	.define REG_A1TH(n)	(REG_A1TH_BASE | (n << 4))
-	.define REG_A1B(n)	(REG_A1B_BASE | (n << 4))
-	.define REG_DASL(n)	(REG_DASL_BASE | (n << 4))
-	.define REG_DASH(n)	(REG_DASH_BASE | (n << 4))
-	.define REG_DASB(n)	(REG_DASB_BASE | (n << 4))
-	.define REG_A2AL(n)	(REG_A2AL_BASE | (n << 4))
-	.define REG_A2AH(n)	(REG_A2AH_BASE | (n << 4))
-	.define REG_NTRL(n)	(REG_NTRL_BASE | (n << 4))
+	.define REG_DMAP(n)	REG_DMAP_BASE | (n << 4)
+	.define REG_BBAD(n)	REG_BBAD_BASE | (n << 4)
+	.define REG_A1TL(n)	REG_A1TL_BASE | (n << 4)
+	.define REG_A1TH(n)	REG_A1TH_BASE | (n << 4)
+	.define REG_A1B(n)	REG_A1B_BASE | (n << 4)
+	.define REG_DASL(n)	REG_DASL_BASE | (n << 4)
+	.define REG_DASH(n)	REG_DASH_BASE | (n << 4)
+	.define REG_DASB(n)	REG_DASB_BASE | (n << 4)
+	.define REG_A2AL(n)	REG_A2AL_BASE | (n << 4)
+	.define REG_A2AH(n)	REG_A2AH_BASE | (n << 4)
+	.define REG_NTRL(n)	REG_NTRL_BASE | (n << 4)
 
 
 	.macro setreg reg, val
@@ -123,3 +125,11 @@
 	setreg REG_CGDATA, (g >> 3 | b << 2)
 	.endmacro
 
+	.macro wait_vblank
+@wait_vblank_loop:
+	lda REG_HVBJOY
+	and #$80
+	beq @wait_vblank_loop
+	.endmacro
+
+	; vi:ft=asm_ca65: