7 PIC1_DATA_PORT equ 0x21
9 PIC2_DATA_PORT equ 0xa1
11 ICW1_ICW4_NEEDED equ 0x01
35 ; send ICW1 saying we'll follow with ICW4 later
36 mov al, ICW1_INIT | ICW1_ICW4_NEEDED
38 ; send ICW2 with IRQ remapping
40 out PIC1_DATA_PORT, al
42 out PIC2_DATA_PORT, al
43 ; send ICW3 to setup the master/slave relationship
44 ; ... set bit3 = 3rd interrupt input has a slave
46 out PIC1_DATA_PORT, al
47 ; ... set slave id to 2
49 OUT PIC2_DATA_PORT, al
50 ; send ICW4 to set 8086 mode (no calls generated)
52 out PIC1_DATA_PORT, al
53 out PIC2_DATA_PORT, al
54 ; done, reset the data port to 0
56 out PIC1_DATA_PORT, al
57 out PIC2_DATA_PORT, al
66 ; cascaded IRQ, send EOI to slave PIC first
69 .eoi_master: ; send EOI to master PIC
75 ; special entry point for IRQ7 to catch and disregard spurious interrupts
76 global intr_entry_irq7_verify
77 intr_entry_irq7_verify:
87 global intr_entry_irq15_verify
88 intr_entry_irq15_verify:
96 ; it was spurious, send EOI to master PIC and iret
105 %macro intr_entry_err 2
108 push dword %1 ; push interrupt number
109 jmp intr_entry_common
112 %macro intr_entry_noerr 2
115 push dword 0 ; push dummy error code
116 push dword %1 ; push interrupt number
117 jmp intr_entry_common
121 pusha ; save general purpose registers
123 popa ; restore general purpose registers
124 add esp, 8 ; remove error code and intr number from the stack
127 ; interrupt entry points
128 intr_entry_noerr 0, div
129 intr_entry_noerr 1, debug
130 intr_entry_noerr 2, nmi
131 intr_entry_noerr 3, bpt
132 intr_entry_noerr 4, ovf
133 intr_entry_noerr 5, bound
134 intr_entry_noerr 6, ill
135 intr_entry_noerr 7, nodev
136 intr_entry_err 8, dbl
137 intr_entry_noerr 9, copseg
138 intr_entry_err 10, tss
139 intr_entry_err 11, segpres
140 intr_entry_err 12, stack
141 intr_entry_err 13, prot
142 intr_entry_err 14, page
143 intr_entry_noerr 16, fpu
144 intr_entry_err 17, align
145 intr_entry_noerr 18, mce
146 intr_entry_noerr 19, sse
147 ; remapped IRQs 0-15 -> 32-47
148 intr_entry_noerr 32, irq0
149 intr_entry_noerr 33, irq1
150 intr_entry_noerr 34, irq2
151 intr_entry_noerr 35, irq3
152 intr_entry_noerr 36, irq4
153 intr_entry_noerr 37, irq5
154 intr_entry_noerr 38, irq6
155 intr_entry_noerr 39, irq7
156 intr_entry_noerr 40, irq8
157 intr_entry_noerr 41, irq9
158 intr_entry_noerr 42, irq10
159 intr_entry_noerr 43, irq11
160 intr_entry_noerr 44, irq12
161 intr_entry_noerr 45, irq13
162 intr_entry_noerr 46, irq14
163 intr_entry_noerr 47, irq15
165 intr_entry_noerr 255, default