26 ; special entry point for IRQ7 to catch and disregard spurious interrupts
27 global intr_entry_irq7_verify
28 intr_entry_irq7_verify:
38 global intr_entry_irq15_verify
39 intr_entry_irq15_verify:
47 ; it was spurious, send EOI to master PIC and iret
56 %macro intr_entry_err 2
58 push dword %1 ; push interrupt number
62 %macro intr_entry_noerr 2
64 push dword 0 ; push dummy error code
65 push dword %1 ; push interrupt number
70 pusha ; save general purpose registers
72 popa ; restore general purpose registers
73 add esp, 8 ; remove error code and intr number from the stack
76 ; interrupt entry points
77 intr_entry_noerr 0, div
78 intr_entry_noerr 1, debug
79 intr_entry_noerr 2, nmi
80 intr_entry_noerr 3, bpt
81 intr_entry_noerr 4, ovf
82 intr_entry_noerr 5, bound
83 intr_entry_noerr 6, ill
84 intr_entry_noerr 7, nodev
86 intr_entry_noerr 9, copseg
87 intr_entry_err 10, tss
88 intr_entry_err 11, segpres
89 intr_entry_err 12, stack
90 intr_entry_err 13, prot
91 intr_entry_err 14, page
92 intr_entry_noerr 15, rsvd
93 intr_entry_noerr 16, fpu
94 intr_entry_err 17, align
95 intr_entry_noerr 18, mce
96 intr_entry_noerr 19, sse
97 ; remapped IRQs 0-15 -> 32-47
98 intr_entry_noerr 32, irq0
99 intr_entry_noerr 33, irq1
100 intr_entry_noerr 34, irq2
101 intr_entry_noerr 35, irq3
102 intr_entry_noerr 36, irq4
103 intr_entry_noerr 37, irq5
104 intr_entry_noerr 38, irq6
105 intr_entry_noerr 39, irq7
106 intr_entry_noerr 40, irq8
107 intr_entry_noerr 41, irq9
108 intr_entry_noerr 42, irq10
109 intr_entry_noerr 43, irq11
110 intr_entry_noerr 44, irq12
111 intr_entry_noerr 45, irq13
112 intr_entry_noerr 46, irq14
113 intr_entry_noerr 47, irq15
115 intr_entry_noerr 255, default