5de4faf79b0f9dfe8e3702cc6f58e2e70c5d4b94
[gbajam21] / src / dma.c
1 #include "dma.h"
2
3 /* DMA Options */
4 #define DMA_ENABLE                              0x80000000
5 #define DMA_INT_ENABLE                  0x40000000
6 #define DMA_TIMING_IMMED                0x00000000
7 #define DMA_TIMING_VBLANK               0x10000000
8 #define DMA_TIMING_HBLANK               0x20000000
9 #define DMA_TIMING_DISPSYNC             0x30000000
10 #define DMA_16                                  0x00000000
11 #define DMA_32                                  0x04000000
12 #define DMA_REPEAT                              0x02000000
13 #define DMA_SRC_INC                             0x00000000
14 #define DMA_SRC_DEC                             0x00800000
15 #define DMA_SRC_FIX                             0x01000000
16 #define DMA_DST_INC                             0x00000000
17 #define DMA_DST_DEC                             0x00200000
18 #define DMA_DST_FIX1                    0x00400000
19 #define DMA_DST_RELOAD                  0x00600000
20
21 /* DMA Register Parts */
22 #define DMA_SRC         0
23 #define DMA_DST         1
24 #define DMA_CTRL        2
25
26 static volatile uint32_t *reg_dma[4] = {(void*)0x040000b0, (void*)0x040000bc, (void*)0x040000c8, (void*)0x040000d4 };
27
28 void AAS_DoDMA3(void*, void*, uint32_t);
29
30 /* --- perform a copy of words or halfwords using DMA --- */
31
32 void dma_copy32(int channel, void *dst, void *src, int words, unsigned int flags)
33 {
34 #ifndef NOSOUND
35         if(channel == 3) {
36                 AAS_DoDMA3(src, dst, words | flags | DMA_32 | DMA_ENABLE);
37                 return;
38         }
39 #endif
40         reg_dma[channel][DMA_SRC] = (uint32_t)src;
41         reg_dma[channel][DMA_DST] = (uint32_t)dst;
42         reg_dma[channel][DMA_CTRL] = words | flags | DMA_32 | DMA_ENABLE;
43 }
44
45 void dma_copy16(int channel, void *dst, void *src, int halfwords, unsigned int flags)
46 {
47 #ifndef NOSOUND
48         if(channel == 3) {
49                 AAS_DoDMA3(src, dst, halfwords | flags | DMA_16 | DMA_ENABLE);
50                 return;
51         }
52 #endif
53         reg_dma[channel][DMA_SRC] = (uint32_t)src;
54         reg_dma[channel][DMA_DST] = (uint32_t)dst;
55         reg_dma[channel][DMA_CTRL] = halfwords | flags | DMA_16 | DMA_ENABLE;
56 }
57
58 /* --- fill a buffer with an ammount of words and halfwords using DMA --- */
59
60 static uint32_t fill[4];
61
62 void dma_fill32(int channel, void *dst, uint32_t val, int words)
63 {
64         fill[channel] = val;
65 #ifndef NOSOUND
66         if(channel == 3) {
67                 AAS_DoDMA3(fill + channel, dst, words | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_32 | DMA_ENABLE);
68                 return;
69         }
70 #endif
71         reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
72         reg_dma[channel][DMA_DST] = (uint32_t)dst;
73         reg_dma[channel][DMA_CTRL] = words | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_32 | DMA_ENABLE;
74 }
75
76 void dma_fill16(int channel, void *dst, uint16_t val, int halfwords)
77 {
78         fill[channel] = val;
79 #ifndef NOSOUND
80         if(channel == 3) {
81                 AAS_DoDMA3(fill + channel, dst, halfwords | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_16 | DMA_ENABLE);
82                 return;
83         }
84 #endif
85         reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
86         reg_dma[channel][DMA_DST] = (uint32_t)dst;
87         reg_dma[channel][DMA_CTRL] = halfwords | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_16 | DMA_ENABLE;
88 }