void dma_copy32(int channel, void *dst, void *src, int words, unsigned int flags)
{
+#ifndef NOSOUND
if(channel == 3) {
AAS_DoDMA3(src, dst, words | flags | DMA_32 | DMA_ENABLE);
- } else {
- reg_dma[channel][DMA_SRC] = (uint32_t)src;
- reg_dma[channel][DMA_DST] = (uint32_t)dst;
- reg_dma[channel][DMA_CTRL] = words | flags | DMA_32 | DMA_ENABLE;
+ return;
}
+#endif
+ reg_dma[channel][DMA_SRC] = (uint32_t)src;
+ reg_dma[channel][DMA_DST] = (uint32_t)dst;
+ reg_dma[channel][DMA_CTRL] = words | flags | DMA_32 | DMA_ENABLE;
}
void dma_copy16(int channel, void *dst, void *src, int halfwords, unsigned int flags)
{
+#ifndef NOSOUND
if(channel == 3) {
AAS_DoDMA3(src, dst, halfwords | flags | DMA_16 | DMA_ENABLE);
- } else {
- reg_dma[channel][DMA_SRC] = (uint32_t)src;
- reg_dma[channel][DMA_DST] = (uint32_t)dst;
- reg_dma[channel][DMA_CTRL] = halfwords | flags | DMA_16 | DMA_ENABLE;
+ return;
}
+#endif
+ reg_dma[channel][DMA_SRC] = (uint32_t)src;
+ reg_dma[channel][DMA_DST] = (uint32_t)dst;
+ reg_dma[channel][DMA_CTRL] = halfwords | flags | DMA_16 | DMA_ENABLE;
}
/* --- fill a buffer with an ammount of words and halfwords using DMA --- */
void dma_fill32(int channel, void *dst, uint32_t val, int words)
{
fill[channel] = val;
+#ifndef NOSOUND
if(channel == 3) {
AAS_DoDMA3(fill + channel, dst, words | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_32 | DMA_ENABLE);
- } else {
- reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
- reg_dma[channel][DMA_DST] = (uint32_t)dst;
- reg_dma[channel][DMA_CTRL] = words | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_32 | DMA_ENABLE;
+ return;
}
+#endif
+ reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
+ reg_dma[channel][DMA_DST] = (uint32_t)dst;
+ reg_dma[channel][DMA_CTRL] = words | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_32 | DMA_ENABLE;
}
void dma_fill16(int channel, void *dst, uint16_t val, int halfwords)
{
fill[channel] = val;
+#ifndef NOSOUND
if(channel == 3) {
AAS_DoDMA3(fill + channel, dst, halfwords | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_16 | DMA_ENABLE);
- } else {
- reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
- reg_dma[channel][DMA_DST] = (uint32_t)dst;
- reg_dma[channel][DMA_CTRL] = halfwords | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_16 | DMA_ENABLE;
+ return;
}
+#endif
+ reg_dma[channel][DMA_SRC] = (uint32_t)(fill + channel);
+ reg_dma[channel][DMA_DST] = (uint32_t)dst;
+ reg_dma[channel][DMA_CTRL] = halfwords | DMA_SRC_FIX | DMA_TIMING_IMMED | DMA_16 | DMA_ENABLE;
}