.p816
+ .include "65816.inc"
.include "hwregs.inc"
.segment "rodata"
.include "data.inc"
+ .include "sintab.inc"
.segment "code"
; VMEM map
- ; 0000: tilemap for BG1 (32x32 4bpp: 512b)
+ ; 0000: tilemap for BG1 (32x32 word tile refs, 2kb)
; 2048: BG3-base (h/v offsets)
; 8192: tile data (16k)
-
vmem_tiles_offs = 4096 ; 4k words
- hoffs_offs = 1024 ; 2k words
+ vmem_hoffs_offs = 1024 ; 2k words
+ vmem_voffs_offs = vmem_hoffs_offs + 32
sei
+ ; get out of 6502 emulation mode
clc
xce
- rep #$10
- .i16
+ ; initialize stack
+ I16
ldx #$1fff
txs
- sep #$10
- .i8
+ I8
jsr snes_init
+ setreg REG_SETINI, $4 ; 239 lines
setreg REG_BGMODE, $02 ; mode 2, 8x8 tiles
setreg REG_BG12NBA, $1 ; tiles at offs 8kb
setreg REG_TM, $1 ; main screen: BG1
+ setreg REG_BG3SC, (vmem_hoffs_offs / 1024) << 2
ldx #0
cmap_loop:
pea logo4bpp_tiles
pea vmem_tiles_offs
jsr copy_vmem
- rep #$20
- .a16
+ A16
pla
pla
pla
- sep #$20
- .a8
+ A8
pea logo4bpp_tilemap_rows * logo4bpp_tilemap_cols * 2
pea logo4bpp_tilemap
pea 0
jsr copy_vmem
- rep #$20
- .a16
+ A16
pla
pla
pla
- sep #$20
- .a8
+ A8
fblank 0
-halt:
- jmp halt
+ ; main loop
+ nframe = 0
+ ncol = 2
+ anim = 4
+ vscroll = 8
+ shadow_voffs = 32
- ; copy_vmem(vmem_offset, src, num_words)
+ A16
+ stz nframe
+mainloop:
+ lda nframe
+ lsr
+ lsr
+ sta anim
+ inc nframe
+ A8
+
+ stz ncol
+@cloop:
+ lda anim
+ clc
+ adc ncol
+ asl
+ tax
+ lda sintab,x
+ sec
+ sbc #128
+ asr
+ asr
+ asr
+
+ ldx ncol
+ bne @per_tile_offs
+ ; global scroll for the first column
+ sta vscroll
+ bra @end
+
+@per_tile_offs:
+ pha
+ lda ncol
+ asl
+ tax ; x = ncol << 1
+ pla
+ sta shadow_voffs,x
+ inx
+ lda #$20
+ sta shadow_voffs,x
+@end:
+ inc ncol
+ lda ncol
+ and #$1f
+ bne @cloop
+
+ ; wait for vblank, and DMA the table to vmem
+ wait_vblank
+ fblank 1
+ lda vscroll
+ sta REG_BG1VOFS
+ stz REG_BG1VOFS
+ lda #(vmem_voffs_offs & $ff)
+ sta REG_VMADDL
+ lda #(vmem_voffs_offs >> 8)
+ sta REG_VMADDH
+ setreg REG_MDMAEN, 0
+ setreg REG_DMAP(0), $01 ; A->B words at X,X+1, A inc
+ setreg REG_BBAD(0), REG_VMDATAL & $ff ; write to VMDATAL,VMDATAH
+ setreg REG_A1TL(0), shadow_voffs
+ setreg REG_A1TH(0), 0
+ setreg REG_A1B(0), 0
+ setreg REG_DASL(0), 64
+ setreg REG_DASH(0), 0
+ setreg REG_DASB(0), 0
+ setreg REG_MDMAEN, 1 ; enable DMA channel 0
+ fblank 0
+ A16
+ jmp mainloop
+
+ ; copy_vmem(vmem_offset, src, num_bytes)
copy_vmem:
rep #$30 ; 16bit accumulator and index registers
.a16
phd ; save d
tsc ; and make it point to the stack
tcd
- sep #$20 ; restore 8bit accum
- .a8
+ A8 ; restore 8bit accum
; stack frame
; $1 saved D
; $3 return address
; $5 vmem_offs
; $7 src
- ; $9 num_words
+ ; $9 num_bytes
lda #$80 ; auto incerment after wiriting high byte
sta REG_VMAINC
bne @loop
pld
- sep #$10 ; back to 8bit index registers
- .i8
+ I8 ; back to 8bit index registers
rts
stz REG_BG4SC
stz REG_BG12NBA
stz REG_BG34NBA
- stz REG_BG1HOFFS
- stz REG_BG1HOFFS
- stz REG_BG1VOFFS
- stz REG_BG1VOFFS
- stz REG_BG2HOFFS
- stz REG_BG2HOFFS
- stz REG_BG2VOFFS
- stz REG_BG2VOFFS
- stz REG_BG3HOFFS
- stz REG_BG3HOFFS
- stz REG_BG3VOFFS
- stz REG_BG3VOFFS
- stz REG_BG4HOFFS
- stz REG_BG4HOFFS
- stz REG_BG4VOFFS
- stz REG_BG4VOFFS
+ stz REG_BG1HOFS
+ stz REG_BG1HOFS
+ stz REG_BG1VOFS
+ stz REG_BG1VOFS
+ stz REG_BG2HOFS
+ stz REG_BG2HOFS
+ stz REG_BG2VOFS
+ stz REG_BG2VOFS
+ stz REG_BG3HOFS
+ stz REG_BG3HOFS
+ stz REG_BG3VOFS
+ stz REG_BG3VOFS
+ stz REG_BG4HOFS
+ stz REG_BG4HOFS
+ stz REG_BG4VOFS
+ stz REG_BG4VOFS
setreg REG_VMAINC, $80
stz REG_VMADDL
stz REG_VMADDH
stz REG_MDMAEN
stz REG_HDMAEN
stz REG_MEMSEL
+
+ ; clear vmem
+ I16
+ setreg REG_VMAINC, $80
+ ldx $4000
+@clear: stz REG_VMDATAL
+ stz REG_VMDATAH
+ dex
+ bne @clear
+ I8
rts
; cartridge header
projects / snes_test1 / blobdiff