- reorganized project directory structure

[z80comp2] / rom / uart.inc

diff --git a/rom/uart.inc b/rom/uart.inc
new file mode 100644 (file)
index 0000000..ff1868d
--- /dev/null
+++ b/rom/uart.inc
@@ -0,0 +1,91 @@
+; vi:filetype=z80:
+
+UART_REG_MODEA         equ $00 ; MR1A/MR2A
+UART_REG_STATA         equ $01 ; SRA (rd)
+UART_REG_CSELA         equ $01 ; CSRA (wr)
+UART_REG_CMDA          equ $02 ; CRA (wr)
+UART_REG_DATAA         equ $03 ; RBA (rd) / TBA (wr)
+
+UART_REG_MODEB         equ $08 ; MR1B/MR2B
+UART_REG_STATB         equ $09 ; SRB (rd)
+UART_REG_CSELB         equ $09 ; CSRB (wr)
+UART_REG_CMDB          equ $0a ; CRB (wr)
+UART_REG_DATAB         equ $0b ; RBB (rd) / TBB (wr)
+
+UART_REG_IPCR          equ $04 ; (rd)
+UART_REG_AUXCTL                equ $04 ; ACR (wr)
+UART_REG_ISTAT         equ $05 ; ISR (rd)
+UART_REG_IMASK         equ $05 ; IMR (wr)
+UART_REG_COUNTH                equ $06 ; CUR (rd)
+UART_REG_COUNTL                equ $07 ; CLR (rd)
+UART_REG_CTSETH                equ $06 ; CTUR (wr)
+UART_REG_CTSETL                equ $07 ; CTLR (wr)
+
+UART_REG_IVEC          equ $0c ; IVR
+UART_REG_IPORT         equ $0d ; (rd)
+UART_REG_OPCR          equ $0d ; (wr)
+UART_REG_CSTART_CMD    equ $0e ; (rd)
+UART_REG_CSTOP_CMD     equ $0f ; (rd)
+UART_REG_OSET          equ $0e ; (wr)
+UART_REG_OCLR          equ $0f ; (wr)
+
+
+UART_M1_5BIT           equ $00
+UART_M1_6BIT           equ $01
+UART_M1_7BIT           equ $02
+UART_M1_8BIT           equ $03
+UART_M1_PAREVEN                equ $00
+UART_M1_PARODD         equ $04
+UART_M1_NOPAR          equ $10
+UART_M1_IRQ_RDY                equ $00
+UART_M1_IRQ_FULL       equ $40
+UART_M1_RX_RTS         equ $80
+
+; stop bit count goes in low nibble of MODE2 register
+UART_M2_STOP1          equ $07
+UART_M2_CTS            equ $10
+UART_M2_TX_RTS         equ $20
+UART_M2_ECHO           equ $40
+UART_M2_LOOP_LOCAL     equ $80
+UART_M2_LOOP_REMOTE    equ $c0
+
+UART_CSEL_TX_300       equ $04
+UART_CSEL_RX_300       equ $40
+UART_CSEL_TX_9600      equ $0b
+UART_CSEL_RX_9600      equ $b0
+UART_CSEL_TX_38400_19200 equ $0c
+UART_CSEL_RX_38400_19200 equ $c0
+UART_CSEL_TX_TIMER     equ $0d
+UART_CSEL_RX_TIMER     equ $d0
+
+UART_STAT_RXRDY                equ $01
+UART_STAT_FFULL                equ $02
+UART_STAT_TXRDY                equ $04
+UART_STAT_TXEMPTY      equ $08
+UART_STAT_ERR_OVR      equ $10
+UART_STAT_ERR_PAR      equ $20
+UART_STAT_ERR_FRM      equ $40
+UART_STAT_ERR_BRK      equ $80
+
+UART_CMD_RX_ON         equ $01
+UART_CMD_RX_OFF                equ $02
+UART_CMD_TX_ON         equ $04
+UART_CMD_TX_OFF                equ $08
+UART_CMD_RST_MPTR      equ $10
+UART_CMD_RST_RX                equ $20
+UART_CMD_RST_TX                equ $30
+UART_CMD_RST_ERR       equ $40
+UART_CMD_RST_BRKINT    equ $50
+UART_CMD_START_BRK     equ $60
+UART_CMD_STOP_BRK      equ $70
+
+UART_OPCR_OP2_TXCA16   equ $01
+UART_OPCR_OP2_TXA      equ $02
+UART_OPCR_OP2_RXA      equ $03
+UART_OPCR_OP3_CTR      equ $04
+UART_OPCR_OP3_TXB      equ $08
+UART_OPCR_OP3_RXB      equ $0c
+UART_OPCR_OP4_RXRDYA   equ $10
+UART_OPCR_OP5_RXRDYB   equ $20
+UART_OPCR_OP6_TXRDYA   equ $40
+UART_OPCR_OP7_TXRDYB   equ $80