+ .set UART_DATA, 0x3f8
+ .set UART_DIVLO, 0x3f8
+ .set UART_DIVHI, 0x3f9
+ .set UART_FIFO, 0x3fa
+ .set UART_LCTL, 0x3fb
+ .set UART_MCTL, 0x3fc
+ .set UART_LSTAT, 0x3fd
+ .set DIV_9600, 115200 / 9600
+ .set LCTL_8N1, 0x03
+ .set LCTL_DLAB, 0x80
+ .set FIFO_ENABLE, 0x01
+ .set FIFO_SEND_CLEAR, 0x04
+ .set FIFO_RECV_CLEAR, 0x02
+ .set MCTL_DTR, 0x01
+ .set MCTL_RTS, 0x02
+ .set MCTL_OUT2, 0x08
+ .set LST_TREG_EMPTY, 0x20
+
+setup_serial:
+ # set clock divisor
+ mov $LCTL_DLAB, %al
+ mov $UART_LCTL, %dx
+ out %al, %dx
+ mov $DIV_9600, %ax
+ mov $UART_DIVLO, %dx
+ out %al, %dx
+ shr $8, %ax
+ mov $UART_DIVHI, %dx
+ out %al, %dx
+ # set format 8n1
+ mov $LCTL_8N1, %al
+ mov $UART_LCTL, %dx
+ out %al, %dx
+ # clear and enable fifo
+ mov $FIFO_ENABLE, %al
+ or $FIFO_SEND_CLEAR, %al
+ or $FIFO_RECV_CLEAR, %al
+ mov $UART_FIFO, %dx
+ out %al, %dx
+ # assert RTS and DTR
+ mov $MCTL_DTR, %al
+ or $MCTL_RTS, %al
+ or $MCTL_OUT2, %al
+ mov $UART_MCTL, %dx
+ out %al, %dx
+ ret
+
+ # expects a character in al
+ser_putchar:
+ push %dx
+
+ mov %al, %ah
+ # wait until the transmit register is empty
+ mov $UART_LSTAT, %dx
+0: in %dx, %al
+ and $LST_TREG_EMPTY, %al
+ jz 0b
+ mov $UART_DATA, %dx
+ mov %ah, %al
+ out %al, %dx
+
+ pop %dx
+ ret
+
+ # expects a string in ds:si
+ser_putstr:
+ mov (%si), %al
+ cmp $0, %al
+ jz 0f
+ call ser_putchar
+ inc %si
+ jmp ser_putstr
+0: ret
+
+