# pcboot - bootable PC demo/game kernel
-# Copyright (C) 2018 John Tsiombikas <nuclear@member.fsf.org>
+# Copyright (C) 2018-2019 John Tsiombikas <nuclear@member.fsf.org>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
.section .boot2,"ax"
.set main_load_addr, 0x100000
+ .set drive_number, 0x7bec
# make sure any BIOS call didn't re-enable interrupts
cli
+ xor %eax, %eax
+ mov drive_number, %al
+ mov %eax, boot_drive_number
+
+ call setup_serial
+
# enter unreal mode
call unreal
# load the whole program into memory starting at 1MB
call load_main
- #mov $0x13, %ax
- #int $0x10
-
# load initial GDT
lgdt (gdt_lim)
# load initial IDT
# the BIOS might have enabled interrupts
cli
- # just in case we were loaded from floppy, turn all floppy motors off
+ # if we were loaded from floppy, turn all floppy motors off
+ movb drive_number, %bl
+ and $0x80, %bl
+ jnz 0f
mov $0x3f2, %dx
in %dx, %al
- and $0xf0, %al
+ and $0xf, %al
out %al, %dx
+0:
mov $10, %ax
call putchar
read_retries: .short 0
- .set drive_number, 0x7bec
read_track:
# set es to the start of the destination buffer to allow reading in
# full 64k chunks if necessary
clearscr:
mov $0xb8000, %edi
- xor %eax, %eax
+ # clear with white-on-black spaces
+ mov $0x07200720, %eax
mov $1000, %ecx
addr32 rep stosl
ret
.set UART_DATA, 0x3f8
+ .set UART_DIVLO, 0x3f8
+ .set UART_DIVHI, 0x3f9
+ .set UART_FIFO, 0x3fa
+ .set UART_LCTL, 0x3fb
+ .set UART_MCTL, 0x3fc
.set UART_LSTAT, 0x3fd
+ .set DIV_9600, 115200 / 9600
+ .set LCTL_8N1, 0x03
+ .set LCTL_DLAB, 0x80
+ .set FIFO_ENABLE_CLEAR, 0x07
+ .set MCTL_DTR_RTS_OUT2, 0x0b
.set LST_TREG_EMPTY, 0x20
+setup_serial:
+ # set clock divisor
+ mov $LCTL_DLAB, %al
+ mov $UART_LCTL, %dx
+ out %al, %dx
+ mov $DIV_9600, %ax
+ mov $UART_DIVLO, %dx
+ out %al, %dx
+ shr $8, %ax
+ mov $UART_DIVHI, %dx
+ out %al, %dx
+ # set format 8n1
+ mov $LCTL_8N1, %al
+ mov $UART_LCTL, %dx
+ out %al, %dx
+ # clear and enable fifo
+ mov $FIFO_ENABLE_CLEAR, %al
+ mov $UART_FIFO, %dx
+ out %al, %dx
+ # assert RTS and DTR
+ mov $MCTL_DTR_RTS_OUT2, %al
+ mov $UART_MCTL, %dx
+ out %al, %dx
+ ret
+
+
ser_putchar:
push %dx
cmp $0x534d4150, %eax
jnz e820_fail
+ # skip areas starting above 4GB as we won't be able to use them
+ cmpl $0, 4(%edi)
+ jnz e820_skip
+
+ # only care for type 1 (usable ram), otherwise ignore
+ cmpl $1, 16(%edi)
+ jnz e820_skip
+
mov buffer, %eax
mov $boot_mem_map, %esi
mov boot_mem_map_size, %ebp
# again, that's [ebp * 8 + esi]
mov %eax, (%esi,%ebp,8)
- # only care for type 1 (usable ram), otherwise ignore
- cmpl $1, 16(%edi)
- jnz e820_skip
-
# skip areas with 0 size (also clamp size to 4gb)
# test high 32bits
cmpl $0, 12(%edi)
movzx %cx, %eax
# first size is in KB, convert to bytes
shl $10, %eax
- mov %eax, 4(%esi)
- cmp $0, %dx
+ jnc 0f
+ # overflow means it's >4GB, clamp to 4GB
+ mov $0xffffffff, %eax
+0: mov %eax, 4(%esi)
incl boot_mem_map_size
+ cmp $0, %dx
jz e801_done
movl $0x1000000, 8(%esi)
movzx %dx, %eax
# second size is in 64kb blocks, convert to bytes
shl $16, %eax
- mov %eax, 12(%esi)
+ jnc 0f
+ # overflow means it's >4GB, clamp to 4GB
+ mov $0xffffffff, %eax
+0: mov %eax, 12(%esi)
incl boot_mem_map_size
e801_done:
clc
saved_esp: .long 0
saved_ebp: .long 0
+saved_eax: .long 0
+saved_es: .word 0
+saved_ds: .word 0
+saved_flags: .word 0
+saved_pic1_mask: .byte 0
+saved_pic2_mask: .byte 0
# drop back to unreal mode to call 16bit interrupt
.global int86
sidt (saved_idtr)
lidt (rmidt)
- # modify the int instruction do this here before the
+ # save PIC masks
+ pushl $0
+ call get_pic_mask
+ add $4, %esp
+ mov %al, saved_pic1_mask
+ pushl $1
+ call get_pic_mask
+ add $4, %esp
+ mov %al, saved_pic2_mask
+
+ # modify the int instruction. do this here before the
# cs-load jumps, to let them flush the instruction cache
mov $int_op, %ebx
movb 8(%ebp), %al
nop
# load registers from the int86regs struct
+ # point esp to the regs struct to load registers with popa/popf
mov %esp, saved_esp
mov %ebp, saved_ebp
mov 12(%ebp), %esp
popal
- mov saved_esp, %esp
+ popfw
+ pop %es
+ pop %ds
+ # ignore fs and gs for now, don't think I'm going to need them
+
+ # move to the real-mode stack, accessible from ss=0
+ # just in case the BIOS call screws up our unreal mode
+ mov $0x7be0, %esp
# call 16bit interrupt
int_op: int $0
+ # BIOS call might have enabled interrupts, cli for good measure
+ cli
- mov saved_ebp, %ebp
- mov 12(%ebp), %esp
- add $34, %esp
+ # save all registers that we'll clobber before having the
+ # chance to populate the int86regs structure
+ mov %eax, saved_eax
+ mov %ds, saved_ds
+ mov %es, saved_es
pushfw
- pushal
- mov saved_esp, %esp
+ popw %ax
+ mov %ax, saved_flags
# re-enable protection
mov %cr0, %eax
mov %ax, %ss
nop
+ # point the esp to our regs struct, to fill it with pusha/pushf
+ mov saved_ebp, %ebp
+ mov 12(%ebp), %esp
+ add $38, %esp
+ mov saved_ds, %ax
+ pushw %ax
+ mov saved_es, %ax
+ pushw %ax
+ # grab the flags and replace the carry bit from the saved flags
+ pushfw
+ popw %ax
+ and $0xfffe, %ax
+ or saved_flags, %ax
+ pushw %ax
+ mov saved_eax, %eax
+ pushal
+ mov saved_esp, %esp
+
# restore 32bit interrupt descriptor table
lidt (saved_idtr)
+
+ # restore PIC configuration
+ call init_pic
+
+ # restore IRQ masks
+ movzbl saved_pic1_mask, %eax
+ push %eax
+ pushl $0
+ call set_pic_mask
+ add $8, %esp
+
+ movzbl saved_pic2_mask, %eax
+ push %eax
+ pushl $1
+ call set_pic_mask
+ add $8, %esp
+
+ # keyboard voodoo: with some BIOS implementations, after returning from
+ # int13, there's (I guess) leftover data in the keyboard port and we
+ # can't receive any more keyboard interrupts afterwards. Reading from
+ # the keyboard data port (60h) once, seems to resolve this. And it's
+ # cheap enough, so why not... I give up.
+ push %eax
+ in $0x60, %al
+ pop %eax
+
sti
popal
pop %ebp
ret
+ .align 4
+ .global boot_drive_number
+boot_drive_number:
+ .long 0
+
# buffer used by the track loader ... to load tracks.
.align 16
buffer:
+ .global low_mem_buffer
+low_mem_buffer:
projects / bootcensus / blobdiff