19 REG_CSTART_OPSET= 0xe,
30 CMD_RST_BRKINT = 0x50,
52 int rxfifo_in, rxfifo_out;
56 static struct port port[2];
57 static uint8_t reg_ipcr;
58 static uint8_t reg_auxctl;
59 static uint8_t reg_istat;
60 static uint8_t reg_imask;
61 static uint16_t reg_count;
62 static uint8_t reg_ivec;
63 static uint8_t reg_opcr;
66 void duart_reset(void)
77 port[i].mode[0] = port[i].mode[1] = 0;
79 port[i].tx = port[i].rx = 0;
80 port[i].rxfifo_in = port[i].rxfifo_out = 0;
84 void duart_serin(int port, int c)
88 static int tx_ready(int pidx)
93 static int rx_ready(int pidx)
95 return port[pidx].rxfifo_in != port[pidx].rxfifo_out;
98 static int rx_full(int pidx)
100 return ((port[pidx].rxfifo_in + 1) & 3) == port[pidx].rxfifo_out;
103 static void command(int pidx, uint8_t data)
105 if(data & CMD_RX_ONOFF) {
106 port[pidx].rx = (data & CMD_RX_ONOFF) == 1;
108 if(data & CMD_TX_ONOFF) {
109 port[pidx].tx = (data & CMD_TX_ONOFF) == 4;
111 switch(data & 0xf0) {
113 port[pidx].modeptr = 0;
121 uint8_t duart_read(int rs)
124 int pidx = (rs >> 3) & 1;
129 res = STAT_TXEMPTY | STAT_TXRDY;
144 void duart_write(int rs, uint8_t data)
147 int pidx = (rs >> 3) & 1;
157 mptr = port[pidx].modeptr;
158 port[pidx].mode[mptr] = data;
159 if(!mptr) port[pidx].modeptr = 1;
165 emu_serout(pidx, data);