4 .set scratchbuf, 0x7b00
9 # move stack to just below the code
13 # use the code segment for data access
22 # load the second stage boot loader and jump to it
23 mov $_boot2_size, %eax
31 # set es to the start of the destination buffer to allow reading in
40 .set SECT_PER_TRACK, 18
45 # read_sectors(first, num)
50 mov ARG_SIDX(%bp), %ax
59 1: cmp ARG_NSECT(%bp), %cx
66 #str_rdsec_msg: .asciz "rdsec: "
76 movw $3, VAR_ATTEMPTS(%bp)
79 # calculate the track (sidx / sectors_per_track)
81 # mov $str_rdsec_msg, %si
82 # call print_str_num16
85 mov $SECT_PER_TRACK, %cx
88 # save the remainder in ax
93 # cylinder (track/2) in ch [0-7] and cl[6,7]<-[8,9]
97 # sector num cl[0-5] is sidx % sectors_per_track (saved in ax)
101 # ah = 2 (read), al = 1 sectors
103 movb drive_number, %dl
107 # abort after 3 attempts
108 decw VAR_ATTEMPTS(%bp)
111 # error detected, reset controller and retry
121 # DBG print first dword
122 # mov $str_read_error + 4, %si
123 # mov %es:(%bx), %eax
126 # increment es:bx accordingly (advance es if bx overflows)
139 str_read_error: .asciz "err read sect: "
142 mov $str_read_error, %si
148 # prints a string (ds:si) followed by a number (eax)
167 # expects string pointer in ds:si
195 # expects number in eax
203 movw $scratchbuf, %si
215 # print the backwards string
239 .set UART_DATA, 0x3f8
240 .set UART_DIVLO, 0x3f8
241 .set UART_DIVHI, 0x3f9
242 .set UART_FIFO, 0x3fa
243 .set UART_LCTL, 0x3fb
244 .set UART_MCTL, 0x3fc
245 .set UART_LSTAT, 0x3fd
246 .set DIV_9600, 115200 / 9600
249 .set FIFO_ENABLE, 0x01
250 .set FIFO_SEND_CLEAR, 0x04
251 .set FIFO_RECV_CLEAR, 0x02
255 .set LST_TREG_EMPTY, 0x20
272 # clear and enable fifo
273 mov $FIFO_ENABLE, %al
274 or $FIFO_SEND_CLEAR, %al
275 or $FIFO_RECV_CLEAR, %al
286 # expects a character in al
292 # wait until the transmit register is empty
295 and $LST_TREG_EMPTY, %al
304 # expects a string in ds:si
315 drive_number: .byte 0