2 pcboot - bootable PC demo/game kernel
3 Copyright (C) 2018 John Tsiombikas <nuclear@member.fsf.org>
5 This program is free software: you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation, either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY, without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program. If not, see <https://www.gnu.org/licenses/>.
25 #define SYSCALL_INT 0x80
27 /* IDT gate descriptor bits */
28 #define GATE_TASK (5 << 8)
29 #define GATE_INTR (6 << 8)
30 #define GATE_TRAP (7 << 8)
31 #define GATE_DEFAULT (1 << 11)
32 #define GATE_PRESENT (1 << 15)
34 /* PIC command and data ports */
36 #define PIC1_DATA 0x21
38 #define PIC2_DATA 0xa1
40 /* PIC initialization command word 1 bits */
41 #define ICW1_ICW4_NEEDED (1 << 0)
42 #define ICW1_SINGLE (1 << 1)
43 #define ICW1_INTERVAL4 (1 << 2)
44 #define ICW1_LEVEL (1 << 3)
45 #define ICW1_INIT (1 << 4)
46 /* PIC initialization command word 4 bits */
47 #define ICW4_8086 (1 << 0)
48 #define ICW4_AUTO_EOI (1 << 1)
49 #define ICW4_BUF_SLAVE (1 << 3) /* 1000 */
50 #define ICW4_BUF_MASTER (3 << 2) /* 1100 */
51 #define ICW4_SPECIAL (1 << 4)
53 /* PIC operation command word 2 bits */
54 #define OCW2_EOI (1 << 5)
57 static void init_pic(int offset);
58 static void gate_desc(desc_t *desc, uint16_t sel, uint32_t addr, int dpl, int type);
60 /* defined in intr_asm.S */
61 void set_idt(uint32_t addr, uint16_t limit);
62 void intr_entry_default(void);
63 void irq7_entry_check_spurious(void);
64 void irq15_entry_check_spurious(void);
66 /* the IDT (interrupt descriptor table) */
67 static desc_t idt[256] __attribute__((aligned(8)));
69 /* table of handler functions for all interrupts */
70 static intr_func_t intr_func[256];
72 static struct intr_frame *cur_intr_frame;
73 static int eoi_pending;
80 set_idt((uint32_t)idt, sizeof idt - 1);
82 /* initialize all entry points and interrupt handlers */
83 for(i=0; i<256; i++) {
84 set_intr_entry(i, intr_entry_default);
88 /* by including intrtab.h here (without ASM being defined)
89 * the series of INTR_ENTRY_* macros will be expanded to a series
90 * of function prototypes for all interrupt entry points and the
91 * corresponding calls to set_intr_entry to set up the IDT slots
95 /* change irq7 and irq15 to special entry points which first
96 * make sure we didn't get a spurious interrupt before proceeding
98 set_intr_entry(IRQ_TO_INTR(7), irq7_entry_check_spurious);
99 set_intr_entry(IRQ_TO_INTR(15), irq15_entry_check_spurious);
101 /* initialize the programmable interrupt controller
102 * setting up the maping of IRQs [0, 15] to interrupts [32, 47]
104 init_pic(IRQ_OFFSET);
108 /* retrieve the current interrupt frame.
109 * returns 0 when called during init.
111 struct intr_frame *get_intr_frame(void)
113 return cur_intr_frame;
116 /* set an interrupt handler function for a particular interrupt */
117 void interrupt(int intr_num, intr_func_t func)
119 intr_func[intr_num] = func;
122 /* this function is called from all interrupt entry points
123 * it calls the appropriate interrupt handlers if available and handles
124 * sending an end-of-interrupt command to the PICs when finished.
126 void dispatch_intr(struct intr_frame frm)
128 cur_intr_frame = &frm;
130 if(IS_IRQ(frm.inum)) {
131 eoi_pending = frm.inum;
134 if(intr_func[frm.inum]) {
135 intr_func[frm.inum](frm.inum);
138 panic("unhandled exception %d, error code: %d\n", frm.inum, frm.err);
140 printf("unhandled interrupt %d\n", frm.inum);
145 end_of_irq(INTR_TO_IRQ(eoi_pending));
149 static void init_pic(int offset)
151 /* send ICW1 saying we'll follow with ICW4 later on */
152 outb(ICW1_INIT | ICW1_ICW4_NEEDED, PIC1_CMD);
153 outb(ICW1_INIT | ICW1_ICW4_NEEDED, PIC2_CMD);
154 /* send ICW2 with IRQ remapping */
155 outb(offset, PIC1_DATA);
156 outb(offset + 8, PIC2_DATA);
157 /* send ICW3 to setup the master/slave relationship */
158 /* ... set bit3 = 3rd interrupt input has a slave */
160 /* ... set slave ID to 2 */
162 /* send ICW4 to set 8086 mode (no calls generated) */
163 outb(ICW4_8086, PIC1_DATA);
164 outb(ICW4_8086, PIC2_DATA);
165 /* done, just reset the data port to 0 */
170 static void gate_desc(desc_t *desc, uint16_t sel, uint32_t addr, int dpl, int type)
172 /* first 16bit part is the low 16bits of the entry address */
173 desc->d[0] = addr & 0xffff;
174 /* second 16bit part is the segment selector for the entry code */
176 /* third 16bit part has the privilege level, type, and present bit */
177 desc->d[2] = ((dpl & 3) << 13) | type | GATE_DEFAULT | GATE_PRESENT;
178 /* last 16bit part is the high 16bits of the entry address */
179 desc->d[3] = (addr & 0xffff0000) >> 16;
182 #define IS_TRAP(n) ((n) >= 32 && !IS_IRQ(n))
183 void set_intr_entry(int num, void (*handler)(void))
185 int type = IS_TRAP(num) ? GATE_TRAP : GATE_INTR;
187 /* the syscall interrupt has to have a dpl of 3 otherwise calling it from
188 * user space will raise a general protection exception. All the rest should
189 * have a dpl of 0 to disallow user programs to execute critical interrupt
190 * handlers and possibly crashing the system.
192 int dpl = (num == SYSCALL_INT) ? 3 : 0;
194 gate_desc(idt + num, selector(SEGM_KCODE, 0), (uint32_t)handler, dpl, type);
197 void end_of_irq(int irq)
199 int intr_state = get_intr_flag();
208 outb(OCW2_EOI, PIC2_CMD);
210 outb(OCW2_EOI, PIC1_CMD);
212 set_intr_flag(intr_state);